NVIDIA bridges compatibility
NVIDIA's PCI Express strategy, at least as far as its announced GeForce PCX products go, relies on the company's new High-Speed Interconnect (HSI) bridge chip. The HSI bridge is a reversible AGP-to-PCI-E interface that is completely transparent to software. Initially, HSI will be used to bridge AGP graphics chips to PCI Express, but the chip could also be used to connect future PCI Express GPUs to AGP interfaces.
The GeForce PCX cards use the HSI chip as a bridge from the GPU's AGP interface to a PCI-E X16 slot. To preserve as much of PCI Express's available bandwidth as possible, NVIDIA cranks up the clock speed of the AGP interface on its NV3x-series GPUs to twice the speed of AGP 8X, yielding "AGP 16X"-class bandwidth. The HSI chip then talks to the GPU at "AGP 16X" speeds, yielding 4.2GB/sec of total bandwidth, which can be used to transfer data in either direction. As we've mentioned, PCI-E X16 can transfer data at 4GB/s in both directions, for a total of 8GB/s of bandwidth. Thus, "AGP 16X" can provide about half of PCI-E X16's total bandwidth, but because most graphics conversations are largely tilted in one direction (upstream toward the graphics card), this solution should map reasonably well to PCI-E X16 for graphics.
According to NVIDIA, GeForce FX graphics chips were actually designed with AGP speeds beyond 8X in mind, and the GPUs in all GeForce PCX graphics cards can sustain at least "AGP 12X" interface speeds. NVIDIA is still validating GPUs for its PCX line, but it's likely that high-end cards like the GeForce PCX 5950 will use GPUs running at "AGP" 16X speed.
Even at "AGP 12X," GeForce PCX cards should have roughly 3.1GB/sec of bus bandwidth. However, NVIDIA is quick to point out that effective PCI Express bandwidth is far more important than theoretical peaks. They offer the following formula to describe the effective bus bandwidth of a PCI Express link:
effective data bus bandwidth = bus BW * (request size/(request size + packet overhead)) * efficiencyNVIDIA's graphics chips support a 64-byte request size and have 20 bytes of packet overhead, which yields 3GB/sec of effective PCI Express bandwidth, assuming 100% efficiency. According to NVIDIA, ATI's graphics chips only support 32-byte request sizes, which drops effective PCI Express bandwidth down to 2.5GB/secless than even AGP 12X. I asked ATI to comment on their supposed 32-byte transfer size and NVIDIA's effective bandwidth formula, but they have yet to respond.
To counter ATI's assertion that bridged PCI-E implementations will add a layer of latency, NVIDIA states that the latency tolerance of its GPUs is higher than the latency of the chipset and interconnect. NVIDIA also claims that its GeForce PCX cards will support PCI Express advanced power management, avoiding another potential pitfall of bridged implementations.
There's no getting around the fact that NVIDIA's GeForce PCX strategy requires an extra chip. Still, this approach has its advantages. Rather than maintaining parallel AGP and PCI-E GPU lines, NVIDIA can build a single GPU for each product class and use the HSI bridge as needed. According to NVIDIA, it would cost close to $20 million to engineer new PCI-E GPUs up and down the GeForce FX line. Faced with numbers like that, a single bridge chip sounds downright economical, especially since it can be used down the road to bridge PCI-E graphics chips to AGP.
Other bridges of note
In the coming weeks, we may hear a lot of smack talk about the shortcomings of bridged PCI Express implementations, but a quick peek into the hard drive world reveals that maybe bridging isn't that big of a deal after all. Today, the vast majority of Serial ATA hard drivesincluding Western Digital's scary-fast Raptor WD740GDare bridged rather than native SATA implementations. Seagate is the only manufacturer to offer native Serial ATA drives, but bridged Raptors have no problem attaining superior performance in addition to supporting Serial ATA features like Tagged Command Queuing and hot plugging.
Of course, graphics cards and hard drives don't have a lot in common, so maybe Serial ATA isn't a fair comparison. Hard drives don't often push the peak bandwidth limits of the interfaces to which they're attached, because hard drives rely primarily on moving parts for data retrieval, not semiconductors. Still, WD's Raptors do illustrate that bridged interfaces are hardly the end of the world for performance or feature support, given the right conditions.
A more apt analogy, perhaps, may be what happens in Athlon 64 systems with HyperTransport links. Like PCI Express, HyperTransport is a high speed, narrow-channel, packet-based interconnect. Before the Athlon 64 debuted, some folks expressed worry over how well a fast/narrow HyperTransport link would carry data for the slow/wide AGP bus. Would it introduce too much latency? (As we understand it, HyperTransport doesn't bridge to AGP so much as encapsulate it, but the conversion from slow/wide to fast/narrow is similar.) Of course, it turns out that the Athlon 64 performs very well, especially in games and graphics.
So we have some hope that NVIDIA's bridge chip won't exact a notable performance penalty. There is some precedent to suggest it may not.
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