AMD spills beans on Seattle's architecture, reference server


Cache networks and coprocessors
— 11:01 AM on August 11, 2014

For some time now, the features of AMD's Seattle server processor have been painted in broad brush strokes. This morning, at the Hot Chips symposium, AMD is filling in most of the missing details. We were treated to an advance briefing last week, where AMD provided previously confidential information about Seattle's cache network, memory controller, I/O features, and coprocessors.

   
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