New CPU ISA called RISC-V

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New CPU ISA called RISC-V

Postposted on Sun Aug 24, 2014 11:32 pm

Saw this news bit over at Extremetech. I think it's pretty exciting.

http://www.extremetech.com/computing/18 ... pen-source

Personally, I dream of a world where there are many CPU suppliers to a common computing platform akin to the early days of x86 and IBM PC/compatibles. ARM is obviously there right now and Imagination Technologies wants to do what ARM is doing with its recent MIPS acquisition plus a fair bit more. Intel, well, I don't think Intel will ever re-open the x86 ISA for everyone given their investment in it. And now this. I find this very exciting and I hope it'll take off, although I'm being cautiously optimistic because there have been other open ISAs such as SPARC but they don't seem to be catching on outside some niche applications. So what will it be?
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Re: New CPU ISA called RISC-V

Postposted on Mon Aug 25, 2014 5:07 pm

Hi Ronch, thanks for posting this story I haven't seen it published any where else. I too am interested in seeing a greater diversity of choice among CPU architectures. I think extreemtech has the right of it, regarding the challenges facing RISC-V, when they say:

The problem with RISC-V is that the target markets — small companies looking for extreme customization — simply may not be big enough to ever spark much in the way of toolset development, familiarity, or cost savings. How many companies both want to build their own extremely customized architecture and can afford to hire the engineers that would do the job more ably that a default Cortex-A5 CPU from ARM? Our guess is not many. This leaves RISC-V in an uneasy no-man’s land — the engineers with the expertise to build the products are most likely familiar with other ecosystems, while the companies that would most benefit from the cost savings and customized features can’t afford the engineers.
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Re: New CPU ISA called RISC-V

Postposted on Mon Aug 25, 2014 5:34 pm

The key to making this a success will be building up an open library of modular peripheral building blocks that people can add to the core design without having to design them entirely from scratch. Things like GPUs, I/O and storage controllers, etc. I don't think it is too far-fetched to think that this could happen, but it isn't going to happen overnight. It is also possible that the whole concept will never achieve the critical mass it needs to succeed long term.
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Re: New CPU ISA called RISC-V

Postposted on Mon Aug 25, 2014 7:34 pm

just brew it! wrote:critical mass
JBI, I completely agree with this comment. But, just to amplify it a bit, not only with the h/w, but also with the entire s/w ecosystem. I submit that these days, a new architecture needs to win by at least an order of magnitude in performance and/or power and/or (some new) capability to have a chance at success.

And even then, only if the ecosystem exists and is well tested.
Last edited by MarkG509 on Mon Aug 25, 2014 8:42 pm, edited 1 time in total.
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Re: New CPU ISA called RISC-V

Postposted on Mon Aug 25, 2014 8:13 pm

I think their best move would be to donate large quantities of this technology to universities for free, that way kids entering this field will be more likely to learn/use/develop with it because it was freely available at an opportune time.
Last edited by The Egg on Tue Aug 26, 2014 7:13 am, edited 1 time in total.
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Re: New CPU ISA called RISC-V

Postposted on Mon Aug 25, 2014 9:16 pm

MarkG509 wrote:
just brew it! wrote:critical mass

JBI, I completely agree with this comment. But, just to amplify it a bit, not only with the h/w, but also with the entire s/w ecosystem. I submit that these days, a new architecture needs to win by at least an order of magnitude in performance and/or power and/or (some new) capability to have a chance at success.

And even then, only if the ecosystem exists and is well tested.

With GCC and the Linux kernel/runtime being ported to pretty much everything, and the Open Source community getting a lot better at writing portable code (having to support everything from ARM SOCs to "Big Iron" will do that!), you have the basis for a freely available, ready-made software ecosystem. You don't need to build an entire ecosystem from scratch any more.

Look at how quickly the Raspberry Pi software ecosystem reached critical mass. Granted, it was based on an existing CPU architecture; but the key piece of the puzzle is having functional ports of the GCC toolchain and Linux kernel, and these apparently exist for RISC-V already.

At this point I think the software ecosystem is a secondary issue, as it appears to be a (mostly) solved problem already. IP for peripherals (to allow construction of effective SOCs) is likely to be a much bigger hurdle, IMO.
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Re: New CPU ISA called RISC-V

Postposted on Tue Aug 26, 2014 1:58 am

I think this is more of a software issue. I would think the hardware part is pretty much taken cared of. Take Nvidia's GPUs for example. Nvidia's GPUs can support x86 host processors as well as ARM. There may be some minor low level work to do but the entire GPU is probably left intact. The same goes for peripheral interfaces such as SATA controllers, USB controllers, etc. But the one thing RISC-V (or any other ISA) need to do is be able to connect to a specific external bus. Take the old Socket 7 bus, for example. A lot of different CPUs plugged into it and although they were all x86, they were based on entirely different internal microarchitectures that simply knew how to talk to the Super 7 Pentium bus architecture. So if RISC-V systems will be built, they will need to adopt the particular microarchitecture using the ISA to a particular bus, say, HyperTransport, seeing as they could license it. This is where software comes in as the new CPU will need to be aware of the things you plug into the same system. AFAIK all, if not most, general purpose processors are hardware-agnostic concerning connecting to external devices, and most peripheral devices are also CPU-agnostic in term of hardware. It's all a matter of vendors providing the drivers written in a language the CPU will accept to control the peripherals.
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Re: New CPU ISA called RISC-V

Postposted on Tue Aug 26, 2014 2:02 am

The Egg wrote:I think there best move would be to donate large quantities of this technology to universities for free, that way kids entering this field will be more likely to learn/use/develop with it because it was freely available at an opportune time.


This.
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Re: New CPU ISA called RISC-V

Postposted on Tue Aug 26, 2014 6:50 am

ronch wrote:I think this is more of a software issue. I would think the hardware part is pretty much taken cared of. Take Nvidia's GPUs for example. Nvidia's GPUs can support x86 host processors as well as ARM. There may be some minor low level work to do but the entire GPU is probably left intact. The same goes for peripheral interfaces such as SATA controllers, USB controllers, etc. But the one thing RISC-V (or any other ISA) need to do is be able to connect to a specific external bus. Take the old Socket 7 bus, for example. A lot of different CPUs plugged into it and although they were all x86, they were based on entirely different internal microarchitectures that simply knew how to talk to the Super 7 Pentium bus architecture. So if RISC-V systems will be built, they will need to adopt the particular microarchitecture using the ISA to a particular bus, say, HyperTransport, seeing as they could license it. This is where software comes in as the new CPU will need to be aware of the things you plug into the same system. AFAIK all, if not most, general purpose processors are hardware-agnostic concerning connecting to external devices, and most peripheral devices are also CPU-agnostic in term of hardware. It's all a matter of vendors providing the drivers written in a language the CPU will accept to control the peripherals.

The software side is already solved, the Linux kernel and development tools have already been ported to it. So code to manage the low-level hardware interfaces (e.g. PCI/PCIe bus) already exists. The point of RISC-V is to be an Open platform. If you still need to license Nvidia's GPU IP, Marvell's SATA controller IP, etc. to create your finished SOC then you've just negated a big chunk of the reason for it to exist in the first place.
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Re: New CPU ISA called RISC-V

Postposted on Tue Aug 26, 2014 3:48 pm

It seems the lowRISC open source SOC (System-on-a-Chip) is based on the RISC-V Instruction Set Architecture. This is cool as there are a number of big names making up its team, including two guys originally involved with the Raspberry Pi and Bunnie Huang from the Novena Laptop as a technical adviser. What's even cooler is their intention for volume silicon manufacture, in the form of a low-cost development board.
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