Fri Apr 04, 2008 4:39 am
Hi, We made the name changes mainly because we wanted to stress that this is not an incremental enhancement like the industry's seen for the last several years, it encompasses all the old functionality (through SSE4), adds those new goodies you've noted, and gives us a much more efficient way of encoding all floating-point and SIMD operations. We're setting a new direction for the future - so our future enhancements will be derivative from AVX.
We basically needed a compact and efficiently decodable way to encode new features like the distinct source register and the vector length, and wanted some growing room for future (unannounced features), without blowing up the instruction size. The new encoding reclaims 4 old prefixes (REX, 66, F2, F3 - plus that leading 0F byte) with a single prefix called VEX, while preserving the same opcode, modrm, and sib bytes we had before. So we get back all those prefixes (if anyone should want to use them in the future) and the 3-byte VEX payload had 3 unused bits for future exansion.... lots of possibilities.
(Mark Buxton - app perf team @ Intel - new to the forum).