Intel has no reason to be in a rush about anything do they?.....

I also think it would be really neat to see a heterogenous cpu with both Nehalem based and Larrabee cores on one die. It would be Intel's version of a Cell processor.

Isn't the real issue that it's not needed?

What is the advantage of building the gpu in the cpu when AMD's integrated chipsets perform so well now, since they have a full gpu in them?

Timna was going to be a low end gpu/cpu back in 2000 - it was canceled as well. If a chipset is $7 - where is the potential savings? Why go to the expense?

Plus

I could see some folding benefits of GPU+CPU. Some of the most parallel parts of the code could be on the GPU side, and the rest on the CPU.

This isn't news. Expreview broke this news (with the exact same information about Havendale intercepting retail and business cycles in January 2010) on September 4, three months ago. The article with the specific slide is below.

http://en.expreview.com/2008/09/04/lynnfield-has-powered-on-and-boo...-linux-windows-prepare-for-holiday-refresh-2009....[iew.com]

Intel's therefore been planning this for quite a while now, and I wouldn't draw any conclusions about the timing of this story.

In fact, Fudzilla reported this on the same day in September:

http://www.fudzilla.com/index.php?option=com_content&task=view%20%2...

This seems to be a re-publication of the same "news" item to drum up sensationalism more than anything else, and it worked -- first Baird picked it up, then Tom's Hardware, er, I mean, TG Daily.

Also, I believe Intel's always stated production of Havendale would start in H2 2008, which is still true -- it just won't be launched until 2010.

And #1, as bowman and UberGerbil have pointed out, Havendale's architecture looks a lot like today's Core 2 systems, except that the GMCH is moved onto the processor socket and talks to the processor die via QuickPath rather than the FSB. The memory controller isn't integrated on the processor die, but rather on a separate northbridge that carries along with it the IGP (with FDI output), a PCI Express 2.0 16-lane controller and a DMI link to the southbridge, the Ibex Peak PCH and family.

As bowman says, Havendale is supposed to be a dual-core Nehalem (essentially half a Bloomfield minus the memory controller) paired in a Multi-Chip Module (MCM) with a chip containing the "Ironlake" GPU (of undetermined architecture) and the memory controller. They're all in one package that plugs into the LGA-1156 socket, but inside they're separate dies -- much like the paired dies of Intel's pre-i7 quads, or the separate cache in the Slot 1 era.

http://www.techradar.com/news/computing-components/graphics-cards/i...

http://en.wikipedia.org/wiki/Intel_Nehalem_(microarchitecture)#Vari...

But there are plenty of reasons for a delay that don't require the GPU to be some exotic x86-based beast. At the very least the GPU is a new version of their IGP (probably significantly more complex than the current ones), which could be taking longer than they expected, and integrating the memory controller is work too, plus the usual platform (chipset) issues. There have been rumors that the Ironlake GPU will be on-die in Auburndale (the mobile variant), and trying to maintain commonality with that may be causing delays for Havendale as well.

Not to mention software: they have to write video drivers for the thing, and while it may look simple architecturally compared to an on-die GPU, the task for the driver writers is anything but trivial, especially when they're working with simulations and early silicon and are expected to deliver something both stable and performant (including support for DX11 and OpenGL) at launch.

And then there are the macro-economic forces: Intel is cutting costs, which may stretch things out, and the prospects for more new processor designs in 2009 aren't good anyway.

To be honest I'm not at all surprised. An integrated graphics unit has been tried several times before. Just one example is Motorola. They actually tried twice. First with the 88000 (which had a special internal "backplane" that allowed for the inclusion of various co-processors on the main chip). But a planned version of that with an integral GPU never saw the light of day. They tried again with Motorola's version of the PowerPC G5. (The PowerPC actually had a variant of the 88000's backplane in it.) The developmental/test chips had such a significant design issue that Motorola decided to completely scrap it rather than fix it.

There are other examples out there too, but the bottom line is an integrated CPU-GPU is much more difficult than most organizations want to admit.

Well I cannot understand all of it also. But I don't think that it is as simple as you say bowman. Or maybe you can explain a little more.

I'm not sure you understand. It's very simple, especially the route Intel has chosen. In the Havendale processors the IGP has its own die. That is, the GPU/CPU is MCM'd. Basically they just move the northbridge to the substrate. There's nothing awestriking about it at all.

On the other hand an interview on bit-tech with an Intel VP hinted that the IGP on these would use the x86 instruction set (i.e. Larrabee derivative) which would explain this delay much better.