The chip that gets to 70 bucks first wins!

Could you not reduce the clock speed on a PIII to match that on a CII?

The problems with the C2 have been pointed out here already, but I'd like to recap.

(1) the tests never compare CPU's with the same multiplier (which obviously makes a difference, especially when the L2 is disabled)

(2) the L2 is smaller and fills up quickly...ESPECIALLY when you raise the multiplier. The P3 core manages to do almost 3 instructions per clock cycle, but only gets to communicate after 8 or more clock cycles (at least a 24 to 1 ratio!). Any time the CPU needs to spit out more data than that, the L2 cache starts to fill up.

XoCoatL,

What, then, would you consider a Celeron 300A at 504 vs. a P II at 504?

It's not possible for the L2 cache to have a latency of 0. That would imply faster-than-light transfer rates. Even the L1 cache has a latency of 3. Most likely, the cache latency is merely being reported incorrectly. JC's has reported that the Coppermine and the Celeron II have the same L2 cache latency.

Originally Posted by XoCoatL
Okie here goes
A Celeron II is a Celeron II and a PIII is a PIII.
Nuff said..Now if the cost of the CII would be the same as the PIII. Wouldnt you think you would buy a PIII..Your buying the least expensive processor would you think it would run a little bit differnet?? But if you were a True Hardware overclocker wouldnt you know the difference between the two anyways..

I've got a theory that explains the results that thresh's gets. The celeron can write to its L2 cache 8.5 faster than it can empty it into the sytem bus. Actually maybe more if you take into account the data width. Since there is such a difference here the entire 128k could be filled up in certain applications, i.e. Q3A. This would bottleneck the whole system and cause it to slow down. Basically what i'm saying is that with such a high multiplier the chip would benefit a lot from having more cache more so than say the c366 @ 550 compared to a 550 cumine. Sorry to all you guys talking about intel conspiricies and such but i think that this and the possible halving of the data bus.

Originally Posted by rotorhead
Here is an interesting twist. From a production point of view these chips make a lot of sense. Could Intel be trying to increase there profit margin by producing the Celeron and Coppermine on the same assembly line, then take the ones that don\'t quite meet the specs and neuter them? You know, like the car industry does, slap in a V6 instead of a V8, some different pinstripes, and wha la, two different cars with no additional overhead cost.

Sorry my post is not performance orientated but it realy makes me wonder what is going on in minds at Intel.

Originally Posted by Antos
You know why your comment makes no sense, wetware?
Because, if it were true, you would be able to hit unlimited FSB speeds (limited only by the RAM). So you\'d see easy 1 ghz overclocks at default voltage.

No, its definitely something to do with the L2 cache not being as efficient, but again, the ONLY way to determine this for a certainity is to use a P3-800 (or 850) on a 100 FSB, to match a 100 FSB C2-533 or C2-566.

Originally Posted by wetwareinterface
you could (and probably should) do those benchmarks at a 66 mhz bus instead of 100mhz
my reasoning is as follows and this first item is a wild speculation on my part and i realize the extreme
conspiracy theory nature of it
1. intel could have implemented a bus speed limiter in the fc-pga format cpu\'s (they have been working on it btw)
to keep those happy overclockers at bay (which would mean the cpu only runs @566 while the components
get the speed boost of the 100 mhz bus which means the cII running at 850 is really running at 566 hence
bad benchmarks (yes there was an improvement over stock 66 mhz but that could be the out of spec setting
of 106 bus speed that was used in the benchmarks posted causing the bus to actually go up a little)
2 .you wont run the 566 any faster but youll get the same results as far as a comparison vs the 850 clocked
if you clock the 850 downward
3. definately turn off the level 2 cache on both cpus and do the benchmark with L2 on and off
4. get a reliable benchmark setup like no 3d acceleration type card ala matrox millenium and run quake 1
at 640x480 IN DOS without glquake just the normal old quake (to rule out graphics card driver involvement)
5. run a reliable benchmarking tool that uses the L2 cache intensively ala quake3 and turn off all features
and run in software mode 640x480 16 bit color depth and 32 bit color depth
just some thoughts and if it really matters buy a pIII coppermine 550e or 600e and crank it up to 133mhz

1 celeronII 533 OC'able to 800 - $116
1 PIII 800E - $695
1 Soyo 6BA+IV - $100
1 L2 Cache disabled setting in the bios - free

an *ntel conspiracy? - priceless.

The bus must be the same to have a fair and equal test.
Bozo

FiringSquad put up some benchmarks from Q3A comparing the Celeron 566 oc'd to 901Mhz. It was with a 106 fsb. They compared the numbers to a 650 coppermine, which runs at 100 fsb of course. The Celery BARELY beat out the coppermine even though it was running 251 Mhz faster. Check it out at http://www.firingsquad.com.

I agree with the conclusions in the article.

In the tests, the performance differences between the two can be accounted for by the differences in bus speed.

These tests don't seem to stress the L2. In most of the tests, there is only small difference between L2 on/off - the biggest is the memory test in which the L2 caches exploit locality.

So, given that the L2 caches don't play a large role in these tests, *if* the Celeron were artifically hampered, you would expect the P3 with no L2 cache to outperform the Celeron with L2 cache. This is not the case. In every test that the L2 plays any role, the P3 without L2 performs worse than the Celeron with L2.

Of course, it would be nice to see (a lot) more data. But, these limited tests definitely do not support the notion that Intel has hampered the Celeron 566.

Originally Posted by CliffC8488
I don\'t think Wintune is a very good test as it is strictly a measure of CPU performance and as a result most, if not all, of the data used by the processing units will reside in L1 cache.

The numbers I\'ve been reading (Thresh\'s and others) show that a Celeron II running at a 100MHz FSB does not nearly keep up with a similarly clocked Coppermine. This leads me to believe that Intel has purposefully crippled the performance of the Celeron II. I think the lack of performance is more likely due to the higher L2 cache latency rather than the lesser amount of L2 cache. The CII has an L2 cache latency of 2 compared to 0 for the CuMine. I wonder about the width of the L2 cache bus too. The CuMine has a 256-bit wide bus to the L2 cache. Speculation is that the CII is a CuMine with half the cache disabled. Well one way to do that is simply disable the most significant address line. Another way is to cut the data bus in half. If Intel did that then there would be a much more pronounced difference in performance versus the former.

CC

Originally Posted by dacKampf
Bring on the equal bus speeds!

(borrow one from Kyle if you have to...:P )

I'd have to ask the same question Office Boy asked.
These benchmarks aren't truly fair in comparing clock-
for-clock performance until one obtains an FC-PGA
Celeron 533 and clocks it at 800MHz with a 100MHz
clock, and a Pentium III 800E as well, and benchmarks
the differences. This way, clock speed is the same and
bus speed is the same, and the only difference that
ought to remain is the L2 cache.

The obvious problem here is that the 800E costs a good
$700-$800, an amount of cash very few people are willing
to put up for performance that they can get out of a chip
hundreds of dollars cheaper, clocked higher than spec.
Unfortunately, since the bus speed is higher, the same
problem comes up -- a comparison of bus speeds is
added in as well.

The problems with AGP overclocks with 133MHz FSBs
on BX boards also disappear with an 800E.

Or, as office boy suggests, an unlocked Coppermine
sample that could run at 800MHz could be used to
compare performance on an equal CPU speed and
bus speed basis.

CyruzTheGreat

erhm... how about some Q3'in eh ? and yea, both with a 100mhz bus.. a C2 900@100 vs a 900mhz P3.. they should be around..

Originally Posted by office boy
My thoughs are, *where the hell are the people with unlocked P3\'s or P3 800/50\'s*