Comments for: Etc.

Which tests would that be Ragnar Dan? AMD's SSE2 implementation is just as good as Intel's in Pentium 4, if not better. Certainly scalar wise, Pentium 4 can't match AMD's implementation. Intel recommends using x87 code for scalar code (read the optimization guide, scalar SSE2 code does not have fully pipelined adds or multiplies, whereas x87 adds is pipelined) -- and the output of their compiler shows this (no SSE code at all for scalar codework)

#26, For one, though I can't find which version it was now but I ... : Ragnar Dan (#28) «

#28, It implies a great deal more about Sandra, I think, than ... : WaltC (#37) «

#37, I agree, I read somewhere that it had more to do with ... : droopy1592 (#38) «

#38, The fact is Intels perform better in SSE2 code that... : Ragnar Dan (#50) «

#2. Posted at 10:33 AM on May 17th 2006, Edited at 10:35 AM on May 17th 2006

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Shintai

Early 2007..if you look on AMDs roadmap it looks more like H2 2008 for this product.

http://www.hkepc.com/bbs/attachments_dir/ext_jpg/quadcore-roadmap_p...

Zamora is the only product there with a shared L3 cache.

#2, You pulled that roadmap out of your ass buttocks. Socket F i... : shank15217 (#5) «

#5, Then show me another better roadmap that forfill your wis... : Shintai (#8) «

#2, That hkepc roadmap is clearly not an official AMD roadmap. Gi... : Hattig (#9) «

#2, You do know that CPU roadmaps can change right? : mesyn191 (#30) «

#30, Ofcause I do, and I´m still awaiting them to do it from t... : Shintai (#41) «

#19. Posted at 12:59 PM on May 17th 2006, Edited at 01:23 PM on May 17th 2006

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UberGerbil

It's worth noting that the K8L as described here (to the extent the specs here are correct, and I'm making accurate sense of them) does not match the Core on potential SSE throughput. It looks like the K8L retains the K8's two SSE execution units, but updates them so that (like Core) they can both execute 128bit ops in a single cycle. But Core has three single-cycle 128bit SSE execution units, each on a separate port. Whether or not the front-end can keep them fed is a separate question, but to the extent it can that's a significant advantage for the Core.

#19, And so far, AMD has done a comparatively poor job of impleme... : Ragnar Dan (#20) «

#20, their "poor" implementation is giving them higher scores ... : shank15217 (#21) «

#21, Whatever your preference, the fact is straight SSE2 te... : Ragnar Dan (#25) «

#25, Like Red Priest said, yur wrong eh. Actually the P4... : swaaye (#27) «

#27, P4 also has a 256 bit l2 : Stranger (#36) «

#19, True. Conroe is still wider than K8L based on what we know, ... : Damage (#23) «

#23, i dont know this spec are bit confusing to me....... AMD ... : Jigar (#39) «

#24. Posted at 02:41 PM on May 17th 2006

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redpriest

#19, We have yet to learn whether or not all three units are symmetrical. I doubt Conroe has 3 symmetrical SSE2 ALUs, but are probably more like Opteron's configuration of 2 symmetrical MMX units and 1 load/store/misc instruction pipe.

#24, We already know the 3 units are not symmetrical on core. The... : mczak (#34) «

#24, "Although Core’s 3 SSE units are not fully symmetric, the di... : UberGerbil (#35) «

#31. Posted at 03:56 PM on May 17th 2006

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Crayon Shin Chan

What exactly is a GT? As in Hypertransport... 5.2GT/s. I thought Gigatexels were a thing of the past.

#31, Giga Transfer : droopy1592 (#32) «

#31, Basicly its transfers/cycle. So 5GT/sec on a 16bit bus would... : Shintai (#33) «

#29. Posted at 03:26 PM on May 17th 2006

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Bauxite

Looks like the FUDs skipped a news item and came directly to here.

#22. Posted at 01:57 PM on May 17th 2006

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Proesterchen

I'm kinda of the edge of the fence after these specs. Sure, they list multiple improvements on the K8 core, but how and where that translates into real world gains I have very little idea ATM. Also, the timing of the release seems rahter fuzzy right now, it could, after all, be between 8 and 18 months away. (which massively affects its prospects as the competitor to Intel's Core)

I wonder about the L3 cache, though, is that hanging off the NB/SRQ architecturally, similar to the off-chip caches and Micron Northbridge proposals (Mamba) from many moons ago, or sitting between the cores and the NB/SRQ? And how will that translate into latency and bandwidth numbers?

#15. Posted at 12:08 PM on May 17th 2006, Edited at 12:09 PM on May 17th 2006

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Jigar

What the hell is this 5.2 GT can any one tell me... Kevin if u could help me....

#15, gigatransfers remember that hypertransport links can be 2/4/... : Stranger (#16) «

#16, Oh yes thanks : Jigar (#17) «

#14. Posted at 11:48 AM on May 17th 2006

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DrDillyBar

My next question has become: Once a level playing field for comparison is established between K8L and Core, which will cost more then it's worth? No sense comparing a Workstation class CPU when most would be going Desktop. (mores the pitty)

#11. Posted at 11:24 AM on May 17th 2006

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just brew it!

K8L looks really good on paper; now AMD just needs to deliver this core in a timely manner. Their ability to execute seems to have improved significantly over the past few years, so I think it is reasonable to be optimistic.

#4. Posted at 10:34 AM on May 17th 2006

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PRIME1

Kanter says the K8L is scheduled to arrive in early 2007
I'm building around September, I guess I will be looking at Intel again for my main system. My last 2 main systems were AMD.

#3. Posted at 10:34 AM on May 17th 2006

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Shinare

Encourraging news from the AMD camp. I'm glad I decided a while back to wait to upgrade until Conroe matures and K8L comes out. My current system should keep me happy till Q1 2007.

#1. Posted at 10:21 AM on May 17th 2006, Edited at 10:22 AM on May 17th 2006

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Nelliesboo

Funny... Right after we talked yesterday I read that at the Inq. and thought "Oh... Nevermind".