Intel moves forward with tri-gate transistors

— 12:00 AM on June 19, 2006

In a bid to improve power efficiency with upcoming process technologies, Intel is moving forward with the development of new tri-gate transistors designed for "high-volume manufacturing." When announcing research on tri-gate transistors four years ago, Intel described the technology like so:

With traditional planar transistors, electronic signals travel as if on a flat, one-way road. This approach has served the semiconductor industry well since the 1960s. But, as transistors shrink to less than 30 nanometers (billionths of a meter), the increase in current leakage means that transistors require increasingly more power to function correctly, which generates unacceptable levels of heat.

Intel's tri-gate transistor employs a novel 3-D structure, like a raised, flat plateau with vertical sides, which allows electronic signals to be sent along the top of the transistor and along both vertical sidewalls as well. This effectively triples the area available for electrical signals to travel, like turning a one-lane road into a three-lane highway, but without taking up more space. Besides operating more efficiently at nanometer-sized geometries, the tri-gate transistor runs faster, delivering 20 percent more drive current than a planar design of comparable gate size.

Intel says these new 3D transistors can bring a 45% increase in transistor switching speed and cut switching power by 35%, thereby allowing for simultaneously faster and cooler-running chips. Tri-gate technology "could become the basic building block for future microprocessors sometime beyond the 45nm process technology node," Intel says, suggesting a move may occur with the switch to 32 nm process technology. Based on leaked Intel architecture roadmaps, Intel's 32 nm transition is scheduled for 2009 with a new, post-Core micro-architecture dubbed Nehalem.
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