Details trickle out about Intel's G965 IGP chipset

— 4:17 PM on August 15, 2006

Intel released driver source code for its G965 integrated graphics chipset last week, and this release has allowed Beyond3D to nab a few tidbits of information about the chipset's integrated GMA X3000 graphics processor. Apparently, the GMA X3000 has 16 programmable scalar ALUs, and all programmable shading is done by unified execution units. In contrast, current graphics processors from ATI and NVIDIA have assorted vector and scalar ALUs, and still have separate vertex and shader processors. Unified shader processors are expected to show up in next-gen GPUs later this year.

Beyond3D has also gleaned a number of other interesting details about the GMA X3000:

  • Triangle setup and related operations are also done in the EUs. In traditional architectures, a special-purpose unit would exist for it.
  • Fog and alpha testing are implemented as parts of the pixel shader, which is expected of all DX10 architectures.
  • Math functions (EXP, LOG, SIN, etc.) are implemented in a 16-way "Mathbox" external unit with both full and partial precision.
  • Taylor expansions are sometimes faster than the Mathbox, because they don't require values to be in such specific bounds.
  • The geometry shader is already used to implement some OpenGL functionality, including wireframe rendering.
  • The pixel shader works on blocks of 16 pixels. It is unknown whether that is also the case for vertices and primitives.
Unfortunately, users wishing to get their hands on a G965-based motherboard may have to bide their time. Delays resulting from a flaw in the integrated graphics are apparently holding back boards.
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