Thus I found myself on the phone yesterday afternoon asking AMD about 65nm L2 cache latencies, possible performance differences, and why the Athlon 64 X2's die size was only reduced from 183mm² at 90nm to 126mm² at 65nm, a much smaller size reduction than expected, despite the transistor count estimate remaining steady at 153.8 million. The AMD rep to whom I was speaking didn't have much in the way of answers for me at the time, and he said that most of the people who would have those answers are already out on vacation for the holidays. But he did say that other folks had just been asking the same set of questions. Lo and behold, Anand published an article today discussing die size questions and increased L2 cache latencies on AMD's 65nm CPUs.
Since I have the same 65nm AMD processors on hand, I thought I'd run a few quick tests, as well. Here's a look at L2 cache latency numbers from CPU-Z on the 65nm and 90nm versions of the Athlon 64 X2 5000+:
We don't yet have a full set of performance results for the 65nm chips, but here's a quick look at results from our MyriMatch benchmark:
We're a little perplexed by these developments. Why would AMD increase the latency of its L2 cache, especially without increasing its size? Why isn't the die area of the 65nm Athlon 64 X2 even smaller compared to the 90nm version with the same transistor count? There are a number of possibilities, but I'll refrain from speculating for now, and we'll await some better answers from AMD.
Update: We now have some answers from AMD.
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