AMD confirms provisions for larger cache at 65nm


— 6:59 PM on December 21, 2006

We now have an explanation straight from AMD for the higher L2 cache latencies in its 65nm Athlon 64 X2 processors. The company has confirmed that the higher latencies are the result of provisions built into its 65nm processors for larger L2 cache sizes. They are quick to emphasize that this revelation is not tantamount to a product announcement, but the provisions are there should they decided to release such a product.

On the subject of the die size of current 65nm parts, they say the relatively small reduction in die area from 90nm to 65nm is not the result of added L2 cache being placed into silicon and then deactivated in the 4800+ and 5000+ models we tested. Instead, the modest reduction in die size has origins in the esoterica of process technology and AMD's model of continuous, gradual improvement to its manufacturing techniques. We've asked for additional detail on this subject, but that's all we can report at this time.

Like what we're doing? Pay what you want to support TR and get nifty extra features.
Top contributors
1. GKey13 - $650 2. JohnC - $600 3. davidbowser - $501
4. cmpxchg - $500 5. DeadOfKnight - $400 6. danny e. - $375
7. the - $360 8. rbattle - $350 9. codinghorror - $326
10. Ryu Connor - $325
   
Register
Tip: You can use the A/Z keys to walk threads.
View options

This discussion is now closed.