Intel's Nehalem to have a bigger die than AMD's Shanghai?

— 9:49 AM on February 28, 2008

Bigger often means better, but the opposite holds true in the world of microprocessors, where greater die sizes often go hand-in-hand with things like higher costs and higher power consumption. According to a report by Fudzilla, Intel may turn out to be the loser in that respect in the forthcoming contest that will pit Nehalem, the company's next-generation native quad- and eight-core chip, against Shanghai, the 45nm version of AMD's Barcelona.

Fudzilla quotes its sources as saying that, while Nehalem will likely be faster than Shanghai, it will have a "significantly bigger" die. The site speculates that Nehalem's die may be 20-30% bigger than Shanghai's. This increase may originate from Nehalem's use of both an integrated memory controller and simultaneous multi-threading, not to mention the launch chips' expected four built-in cores. However, Shanghai will also have quad cores and an integrated memory controller, as well.  The size difference could also be attributable to one of the largest consumers of die area in modern processors: on-chip cache.

Both Nehalem and Shanghai will be built using 45nm process technology, and they should show up in roughly the same time frame. AMD and Intel pin their respective chips' releases in the second half of 2008, and judging by rumors that have previously leaked out, both Nehalem and Shanghai-based Phenoms could launch in the fourth quarter of this year.

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