Get ready for 16GB/s PCI Express x16 slots! PCI-SIG says it has released the PCI Express 3.0 base specification, allowing members to grab it right now directly from its website. The new spec purportedly doubles per-lane bandwidth over second-generation PCIe and quadruples bandwidth over PCIe Gen1, all the while maintaining backward compatibility.
PCI Express 3.0 uses a couple of of tricks to achieve that meaty speed increase. First, the signaling rate has gone up from 5GT/s in PCIe Gen2 to 8GT/s in the new specification. Second, PCIe Gen3 replaces 8b/10b encoding with a more efficient 128b/130b encoding scheme, which increases the amount of actual data pushed per transfer. The end result, PCI-SIG says, is per-lane bandwidth of 1GB/s in each direction. Not bad, huh?
PCI-SIG's announcement also mentions miscellaneous enhancements introduced in the new spec:
These enhancements range in scope from data reuse hints, atomic operations, dynamic power adjustment mechanisms, latency tolerance reporting, loose transaction ordering, I/O page faults, BAR resizing and many more extensions in support of platform energy efficiency, software model flexibility and architectural scalability.
Based on what we last heard about PCIe 3.0, products based on the new spec could be out as early as June of next year. Intel might adopt PCIe 3.0 in its server products by the end of next year, as well.
|Nvidia's PhysX joins the free source party||45|
|Report: The Witcher 3 to be bundled with higher-end Maxwell cards||4|
|Intel announces Achievement Unlocked dev relations program||6|
|Intel partners with Raptr to optimize game settings for Iris graphics||19|
|Socketed Intel desktop Broadwell coming mid-year||30|
|Microsoft announces PC wireless adapter for Xbox One controller||41|
|Nvidia demos new Titan X graphics card at GDC||116|
|Valve's Source 2 engine will be free, too||20|
|And Samsung makes new phone with no sd slot lol whaw whaw whaw||+56|