CPU startup claims to achieve 3x IPC gains with VISC architecture


— 2:22 PM on October 23, 2014

A Silicon Valley startup known as Soft Machines has just exited its "stealth" phase and is presenting at the Linley Microprocessor Conference today. The firm is introducing a new CPU architecture that it calls VISC.

In its press release, Soft Machines claims that the "VISC architecture achieves 3-4 times more instructions per cycle (IPC), resulting in 2-4 times higher performance per watt on single- and multi-threaded applications" than today's CISC- and RISC-inspired CPU designs. Those claims are attention-grabbing, since Intel's high-end CPUs have been limited to per-clock performance gains on the order of 5-15% for a number of generations.

The press release doesn't go into any great detail about how VISC works, but it does offer some sense of what's involved:

The VISC architecture is based on the concept of "virtual cores" and "virtual hardware threads." This new approach enables dynamic allocation and sharing of resources across cores. Microprocessors based on CISC and RISC architectures make use of "physical cores" and "software threads," an approach that has been technologically and economically hamstrung by transistor utilization, frequency and power-scaling limitations.

If this architecture can bunch together groups of disparate execution units and registers in order to accelerate the execution of a single software thread, it could turn out to be something truly interesting. That seems to be the claim the firm is making. Here's more from  President and CTO Mohammad Abdallah:

"We founded Soft Machines with the mission of reviving microprocessor performance-per-watt scaling. We have done just that with the VISC architecture, marking the start of a new era of CPU designs," said Soft Machines co-founder, president and CTO Mohammad Abdallah. "CPU scaling was declared dead when the power wall forced CISC- and RISC-based designs into multi-core implementations that require unrealistically complex multi-threading of sequential applications. The VISC architecture solves this problem 'under the hood' by running virtual hardware threads on virtual cores that far exceed the efficiency of software multi-threading." The VISC architecture scales by changing the number of virtual cores and virtual threads. This approach provides a single architecture capable of addressing the needs of applications spanning from the Internet of Things (IoT), to mobile, and to data center markets.

VISC relies on a "light-weight 'virtual software layer'" to do its work. As a result, Soft Machines says, existing software should be compatible with VISC-style CPUs.

Not only is Soft Machines announcing its invention to the world, but it's also demonstrating a proof a concept in action at the Linley conference: a "dual virtual core VISC" SoC prototype meant to showcase IPC improvements.

If it works, VISC could be a boon for a large swath of the CPU industry. Soft Machines describes itself as being in the business of "licensing and co-developing" VISC products for a range of markets. Some familiar names may be at the front of the line for any licensing deals. Soft Machines says it has raised "over $125 million in funding to date" and counts among its investors Samsung Ventures, AMD, and Mubadala (the Abu Dhabi development company that owns GlobalFoundries).

We hope to learn more about the specifics of the VISC architecture soon.

   
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