TSMC's 10-nm FinFET process toddles towards validation


— 1:27 PM on July 6, 2015

TSMC has made an important step on the road to validating its 10-nm FinFET design process with the awesomely-named "Product-like Validation Vehicle," according to a report by Nikkei (in Japanese behind a paywall) that was picked up by Kitguru. The foundry showed a quad-core Cortex A57 proof of concept at the 52nd Design Automation Conference in San Francisco last month. Details are still a little light; the firm didn't discuss real or expected clock frequencies.


Image: Nikkei

Willy Chen, TSMC's deputy director for the Design & Technology Platform division, discussed the progression from the firm's 16-nm process to its "16-nm+" process which improved performance due to a change in the shape of the fins, and then to 10nm. In total, transistor density on the 10-nm node will be up 110% from the original 16-nm design.

The Taiwanese chip maker previously made a joint announcement with ARM stating their intent to produce chips on 16-nm and 10-nm processes. Suk Lee, Senior Director of TSMC's Design Infrastructure Marketing division, has also recently talked more concretely about 10-nm processors reaching validation by the end of the year, with volume shipments in 2017. This announcement may indicate the firm is still on target for that goal.

   
Register
Tip: You can use the A/Z keys to walk threads.
View options

This discussion is now closed.