Intel builds a better gerbil trap

— 12:00 AM on November 26, 2001

Reuters is running a story announcing that Intel has managed to overcome some roadblocks to the ongoing speed ramp of microprocessors. The solutions consist of a depleted substrate transistor—a form of silicon-on-insulation (SOI)—and a yet-to-be-revealed material alternative to silicon dioxide. From the report:

Using this technology, a transistor is built in an ultra-thin layer of silicon on top of an embedded layer of insulator.

Because this insulator is thinner than other types now used, all of the electrons get used up, resulting in what is called maximum drive current, which helps the transistor switch on and off faster.

The depleted substrate transistor isn't a new idea. IBM had developed a similar technology before this, but it isn't as efficient as Intel's version:
Other chipmakers, such as International Business Machines Corp. are already using what are known as partially depleted substrate transistors, but they were not designed to address what is known as off-state leakage, or the passage of electrons from the source to the drain when no power is supplied to the gate, Hutchinson, the VLSI analyst, said. Intel said this type of transistor results in 100 times lower leakage than traditional silicon-on-insulator implementations.
Because Intel's technique is an evolution of SOI instead of a wholly revolutionary new technology, there's some hope that this technique will see use relatively soon.
The second key element, Intel said, is the development of a new material, which it is not disclosing, that replaces silicon dioxide on the wafer, a layer at the bottom of the gate and between the source and the drain.
Both of these developments should improve the conductivity of microprocessors allowing for less voltage, higher clock speeds, and less heat. Intel is saying that their processors might see such technology incoporated as early as 2005. Since the technology can have a more widespread application than just microprocessors, it will be interesting to see when other chip developers choose to embrace the technology.
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