Bernie Meyerson, IBM's chief technology officer, is claiming that traditional semiconductor scaling died somewhere between 0.13-micron and 0.09-micron:
"This lithographic definition of process technology is absolutely meaningless," said Meyerson, referring to the custom of labeling manufacturing processes with a number designed to correspond to the minimum geometries defined in the process or the half-pitch of the most aggressive interconnect structures. "Somewhere between 130-nm and 90-nm the whole system fell apart. Things stopped working and nobody seemed to notice." He added, "Scaling is already dead but nobody noticed it had stopped breathing and its lips had turned blue."As chip manufacturers shrink manufacturing processes, leakage becomes harder to control. The behavior of leakage current is apparently extremely nonlinear, making it even harder to deal with.
Rather than simply scaling to higher clock speeds, Meyerson suggests future manufacturing innovations will come from silicon-on-insulator, strained silicon, FinFET, and molecular electronics technologies. In the interim, we may also see chip makers turn to dual-core chips to provide better performance without ramping up clock speeds. AMD is set to release a dual-core Opteron next year, and Intel is apparently working on a new mobile chip that integrates two Dothan Pentium M cores.
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