ElectronicsWeekly reports that AMD is in talks with ClearSpeed, the company behind the CSX600 and CS301 co-processors. Jeff Underhill, AMD's business development manager for 64-bit embedded applications, said the two companies are talking about producing a "closely-coupled co-processor." AMD is reportedly worrying that its upcoming quad-core offerings won't offer sufficient floating-point power, something the ClearSpeed co-processors have in spades.
ClearSpeed currently sells the CSX600, a PCI-X-based 64-bit floating point co-processor capable of performing an impressive 25 billion floating point operations per second (gigaFLOPS). The CSX600 fits 96 discrete cores on a single chip, which runs at 250MHz and draws less than 10W of power. ClearSpeed demonstrated the CSX600 (PDF) on an IBM dual-Opteron IntelliStation last summer, where two dual-chip CSX600 boards performed a sustained total of 100 gigaFLOPS. In contrast, AMD's upcoming quad-core Opterons will reportedly perform only 20 gigaFLOPS.
Underhill says that Cell, which is already showing up in Mercury and IBM blade servers, was a "wake up call," and that "things are underway at AMD as a result in looking at future products." Underhill didn't mention what those products were, or what AMD's plans with ClearSpeed were, but it's interesting to see AMD turn its attention to highly parallelized architectures. At IDF last week, Intel revealed details about a potential post-Core architecture that could feature a large number of tiny, simple general-purpose CPU cores, some tuned specifically for tasks like encryption.
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