Next Itanium to sport four cores, new interconnect

— 2:00 AM on May 6, 2006

Real World Technologies has compiled some interesting information about Intel's next-gen Itanium processor, code-named Tukwila. According to Intel slides nabbed at a high-performance computing conference somewhere in Asia, Tukwila will sport four cores with 6 MB of cache each, and it will have an integrated memory controller as well as a "next generation interconnect." Real World Tech says this interconnect will be Intel's Common Systems Interconnect (CSI), a technology akin to HyperTransport that will reportedly be introduced with Tukwila before making its way into Intel's other processors.

According to the Intel slide shown on the site, Tukwila will be supplied with four full-width and two half-width CSI links, which Real World Tech says will add up to a total 32GB/s of bandwidth. As for the integrated memory controller, it will allegedly support Fully Buffered DIMMs through four "or possibly more" memory channels. Real World Tech also speculates that Tukwila will run at 2.5 GHz and that each of its four cores will have two threads, adding up to a total eight threads per processor. Intel appears to claim an estimated 40 billion floating point operations per second (gigaFLOPS) per socket. No release date has been announced for the chip, but the slide says "2008" under the core diagram.

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