Dempsey, Woodcrest, and Clovertown
As I've mentioned, the Bensley platform will be graced with three different processors over the course of its life, all of which will drop into the same LGA771 socket. The first of those CPUs should become available today inside the first Bensley systems. These processors, code-named Dempsey, feature a pair of 65-nanometer, Netburst-derived chips with 2 MB of cache each situated together on a single package. We've seen Dempsey's desktop equivalent, Presler, make impressive gains in power efficiency and performance over previous generations of Netburst processors, although it hasn't caught up with the desktop version of AMD's K8. Dempsey is more of a dual-CPU package than a true dual-core processor design. Each of Dempsey's two "cores" presents itself as a load on the front-side bus, and along with the Blackford MCH, that's three electrical loads per bus. The additional bus load is one of the reasons why Dempsey processors will be limited to a bus clock speed of 1066MHz.
Like other Netburst chips, Dempsey includes support for Hyper-Threading and will present itself as having four front-ends in Windows Task Manager or the likeor eight total front-ends for a dual-socket system. Dempsey also includes Intel's VT instruction set, which provides hardware assistance to server virtualization software.
The top Dempsey variant will clock in at 3.73GHz, and Intel rates this processor's TDP, or thermal design power, at 130 W. Other variants will generate less heat. Intel plans a 3.2GHz version with a 1066MHz bus speed and 95 W TDP, along with some versions that sport a 667MHz bus and a 95 W TDP. The various Dempsey incarnations will be known as the Xeon 5000 series.
Dempsey is looking like a short-term stopgap, however, with the next-generation Woodcrest CPU on the horizon. Woodcrest is based on Intel's hotly anticipated Core microarchitecture, just like its desktop and mobile equivalents, Conroe and Merom. We've discussed the Core architecture elsewhere, so I won't go too deep into specifics here, except to say Core is a four-issue-wide architecture with deeper instruction queues and more execution resources than competing x86 processors.
Like Dempsey, Woodcrest is manufactured using a 65-nm fabrication process, but that's about where the similarities end. Woodcrest is a single chip, not two chips in a package, and its two cores share a common L2 cache that's 4 MB in size. Space in the shared cache is allocated dynamically according to the needs of the two cores, and the processors can pass data between each other via the L2 cache. Thanks to its cache sharing, Woodcrest needs only to issue cache coherency updates for one chip per socket and presents only one electrical load on the front-side bus. As a result, Bensley systems with Woodcrest processors can run at bus speeds up to 1333MHz.
The fastest version of Woodcrest at launch will run at 3GHz on a 1333MHz bus, and Intel rates its TDP at 80 Wquite a bit less than the top Dempsey. Things have gone better than expected with Woodcrest overall, so all lower bins of Woodcrest have been revised down to 65 W TDP. Intel even plans low-voltage versions with a 40 W TDP. Most Bensley servers should accept Woodcrest as a drop-in replacement for Dempsey, although it's always best to check with the vendor about such things.
Intel is saying Woodcrest-based systems will be "definitely" be available in the third quarter of this year, but to give you some indication of how close it really is, we were allowed to poke, prod, test and examine a fully operational Bensley/Woodcrest system. If I were a betting man, I would expect the things to ship in early July, if not sooner. Intel is obviously pushing hard to get these things out of the door.
We also got a snapshot of the third processor slated for the Bensley platform:
Clovertown is essentially two Woodcrests together on a single package, for what Intel is calling the first "quad-core" processor. Like Dempsey, Clovertown will present two electrical loads on the front-side bus, as the two chips on the package communicate with one another and the world using the FSB. Each chip will have its own 4MB L2 cache shared between two cores, and as one might expect, the bus speed will top out at 1066MHz. We don't yet have any word on clock speeds, but Intel is targeting a TDP of 80 W for most Clovertown processors, while the top performance model should come in at 120 W. Clovertown could well be a simple drop-in replacement for Dempsey and Woodcrest, provided that server and motherboard makers make the necessary provisions for power delivery and cooling. Obviously, any server that can cool a Dempsey ought to be able to keep a Clovertown happy. We didn't get a chance to play with a Clovertown server, but Intel did have one operating in its labs during our visit, and they are aiming to release these processors in the first quarter of next year.
Intel has several other interesting names on its roadmap in the near future. One of those is Tulsa, which may be the last of the Netburst-based processors. Due in the second half of this year, Tulsa is a single chip with two Netburst CPU cores onboard, each with its own 1MB L2 cache, and a common, shared L3 cache of 16MB. The die size? Think Wyoming.
A beast like this would probably only be possible on a 65-nanomemter fabrication process, and even so, the fastest version will run at 3.4GHz and have a formidable TDP of 150 W. There will be some 95 W versions at lower speeds, as well. Tulsa is aimed at very high end servers and won't compete directly with Woodcrest in the higher-volume dual-processor server market.
After Clovertown arrives in early '07, Tulsa should be replaced by Tigerton, which looks for all the world like Clovertown with a different name, obviously aimed at higher-end servers. Another Clovertown derivative, Kenstsfield, should make its way to the desktop around the same time, likely as an Extreme Edition type of product.
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