I imagine an enormous trebuchet, loaded up to the max, ready to begin its slowly accelerating rotation. Intel tells us it plans to "launch" a whole host of new products today, including 17 new CPUs, seven 5-series chipsets, and next-gen Wi-Fi and WiMax network adapters. These products, presumably, are being launched at consumers, so you might want to duck.
Those numbers are correct, of course, but devoid of context, they may seem a little overly dramatic. At the heart of all of these product introductions is a core set of technologies, based on the microprocessor known as Clarkdale, and those technologies have been spun into a range of products for different markets. This explosion of new processors and chipsets marks the final major step in the march of the microprocessor architecture known as Nehalem across Intel's core desktop and mobile lineups. If you've been paying attention, you'll know that's likely a very good thing, since earlier Core i5 and i7 processors have been excellent in most ways that matter, including performance, power efficiency, and—starting with the introduction of the Lynnfield chips this past fall—value.
Over the 'dale and through the 'field, to grandmother's house... Wait, what?
From the beginning, the watchword for Nehalem-derived processors has been integration. The first Bloomfield chips brought the memory controller onto the CPU, and the Lynnfield follow-up integrated PCI Express connectivity, as well. Each of those steps has paid dividends in terms of performance, power consumption, and package size. Now, Clarkdale brings graphics into the same package, as part of an unorthodox two-chip solution.
That solution involves pairing a fairly traditional-looking CPU with, really, a fairly traditional-looking north bridge component, both on one package that fits into a socket. The two chips communicate via a dedicated, high-speed link on the multi-chip package; you can see the MCP interfaces on both chips in the illustration below.
The microprocessor is actually the smaller of the two chips on the Clarkdale package. This is a dual-core processor with 256KB of L2 cache per core and a shared, 4MB L3 cache that is 16-way set associative. Like prior CPUs derived from the Nehalem microarchitecture, this CPU can track dual hardware threads per core, so it exposes a total of four threads to the operating system and applications. (Yes, Nehalem is the name for an architecture now. Intel has evidently given up on trying to call multiple successive generations of its microarchitectures "Core." In that vein, the CPU portion of Clarkdale is code-named Westmere, and the Westmere name will also refer to a family of 32-nm microprocessors.) Clarkdale inherits all sorts of Nehalem goodness, including a collection of intelligent power-saving measures and the related Turbo Boost feature that allows the CPU to range into higher clock frequencies when additional thermal headroom is available.
The Westmere family isn't just a straight shrink of prior parts, either. Intel has added six new SSE instructions aimed at accelerating encryption and decryption via the AES algorithm. Together, these instructions provide what the company calls "full hardware support" for AES. A seventh new instruction, PCLMULDQ, enables carry-less multiplication, which is also important for cryptographic work. Westmere processors include a few new tweaks for power savings, too, but as we understand it, that's about it. This isn't quite the overhaul that, say, Penryn Core 2 chips were compared to their Conroe predecessors. Then again, Westmere follows its mainstream 45-nm cousins by just a few months. In fact, Intel's plans originally called for a dual-core, 45-nm processor with integrated graphics code-named Havendale, but the firm canceled that product and pulled forward the introduction of Clarkdale, instead.
At the time, Intel cited a very healthy 32-nm fabrication process as one of the primary reasons for the schedule change. The 32-nm process is the second generation to employ high-k + metal gate transistors, an innovation that worked exceptionally well at 45 nanometers. The 32-nm process has nine copper-and-low-k dielectric interconnect layers, and for the first time, Intel is using immersion lithography—employing a liquid medium to better focus light—for the production of critical layers. The dielectric thickness is down from 1.0 nm to 0.9 nm, and gate widths are down to 30 nm. Intel claims a 22% increase in transistor performance, and it says the process can be tuned to deliver a 5X to 10X reduction in leakage, depending on the transistor type.
|Penryn||Core 2 Duo||2||2||6 MB||45||410||107|
|Bloomfield||Core i7||4||8||8 MB||45||731||263|
|Lynnfield||Core i5, i7||4||8||8 MB||45||774||296|
|Westmere||Core i3, i5||2||4||4 MB||32||383||81|
|Deneb||Phenom II||4||4||6 MB||45||758||258|
|Propus||Athlon II||4||4||512 KB x 4||45||300||169|
The table above compares Westmere's die size and transistor count to other current processors from Intel and AMD. At 81 mm², Westmere is a pretty darned small chip. Yes, the 45-nm Penryn had more transistors and wasn't all that much larger, but Westmere has relatively more logic and less cache than Penryn—and cache is generally denser. The closest Nehalem-based comparison is probably Bloomfield, since Lynnfield has integrated PCI Express logic that adds some die area. Westmere has half the cache and cores of Bloomfield, but occupies under one-third of the area.
|Silverstone's Strider Titanium PSUs are ready for a high-power future||11|
|VR180 video bridges the gap between YouTube and VR||0|
|Steam 2017 Summer Sale, part deux||15|
|Deals of the week: Z270 mobos, spinning storage, and more||4|
|G.Skill readies up for X299 with quad-channel DDR4 at 4200 MT/s||15|
|Asus' VivoBook S510 is an ultrabook for the budget crowd||15|
|Windows Insider Build 16226 gives users a look at GPU utilization||22|
|Steam's 2017 Summer Sale is downright hot||46|
|Asus XG-C100C NIC breaks the gigabit barrier||34|