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A revised roadmap
Dr. Lisa Su provided an update on AMD's public product roadmap, which now extends into 2013. Dr. Su opened by asserting that future AMD products will "align" to market trends and consumer needs. She described computing power as "practically free now" and said AMD wants to bring computing to lower power and cost points. With that said, Dr. Su also emphasized AMD's commitment to several parts of its traditional core business, including APUs, servers, and "technology leadership" in graphics.

In fact, Su described graphics as one of AMD's "crown jewels" that ends up being the "centerpiece of our roadmap." Fittingly, then, graphics appears at the very top of the firm's roadmap for the next couple of years, headlined by the "Southern Islands" chips that have already begun arriving in the form of the Radeon HD 7000 series. Cards based on the "Tahiti" GPU are already here, and the mid-range "Pitcairn" and low-end "Cape Verde" are expected before the end of this quarter.

Slated for 2013 is a new family of GPUs code-named "Sea Islands." Like their predecessors, the Sea Islands chips will be manufactured on a 28-nm fabrication process, so most of the improvements to them will have to come from the revised GPU architecture and the compute-focused "HSA features." Beyond that, we don't know too terribly much about Sea Islands yet.

We've seen demos of it at multiple trade shows over the course of many months, and the second-generation "Trinity" APU, the replacement for Llano, continues to edge toward release. Also a 32-nm chip, Trinity will benefit mainly from newer internal components. The CPU portion of the chip will be comprised of a pair of dual-core "modules" based on the Bulldozer microarchitecture. In fact, the CPU cores in Trinity have been massaged to improve instruction throughput and assigned a new code-name: Piledriver. Trinity will be the first demonstration of the potential for tweaking this troubled new microarchitecture to better live up to expectations. Meanwhile, Trinity's graphics core will be derived from the Northern Islands generation of products—i.e., Cayman and friends, also known as the Radeon HD 6000 series. Interestingly, Trinity's video block will be borrowed from Southern Islands, so it will presumably include an H.264 encoding engine.

Altogether, AMD thinks Trinity will deliver a nice performance boost over Llano, and it intends to turn those gains into power savings. The firm expects one variant of Trinity to offer performance equivalent to a 35W Llano processor, but in a 17W power envelope. Those 17W parts will be targeted at the same sort of systems that will house Intel's 17W Ivy Bridge processors: ultra-thin laptops, also known as ultrabooks.

Dr. Su offered some positive early indications for Trinity. She said design wins are "tracking ahead of Llano," and that chips are already shipping to PC makers, with products due by the middle of the year. She even pulled out an example of a Trinity-based ultra-thin laptop, a reference design from Compal, to illustrate the potential there. Frankly, at a fairly uniform 18 mm thick across most of its chassis, that system looked a little bit chunky for an ultrabook. Still, we can imagine tolerating a little more bulk if Trinity's Radeon integrated graphics can enable a decent gaming experience in such a system.

The low-power portion of the APU roadmap has seen some changes. Gone are the Brazos follow-ons "Krishna" and "Wichita," originally slated for 2012. Those chips were expected to have up to four enhanced "Bobcat" cores and to be fabricated on a 28-nm process. In their place now is a minor revision of the current product, dubbed "Brazos 2.0." Still a 40-nm chip, Brazos 2.0 adds support for USB 3.0 and for AMD's Turbo Core dynamic clock frequency scaling.

Also coming in 2012 is an important new member of the family: "Hondo," an ultra-low power Brazos-derived part that will be aimed at Windows 8 tablets. Extending the Brazos platform into ULP territory, with TDPs half that of current parts, may prove difficult, but Dr. Su expressed confidence that we will see Win8 tablets with AMD silicon. More importantly, this attempt will be the first of many from AMD to contend in this space. In fact, Su explicitly described an aspiration to take x86 processors into power envelopes below 2W, which she said is "absolutely" feasible, although such a product isn't on the near-term roadmap for 2012 or 2013.

Not mentioned in Dr. Su's speech and only buried in the pre-briefing slide you see above is one other new chip for 2012: "Vishera," a conventional desktop processor for Socket AM3+ motherboards. Yes, AMD still has plans on this front, in part because high-end desktops share silicon with the server product lineup. Vishera will be a 32-nm part with up to eight Piledriver cores and no integrated graphics. If the tweaks to those cores prove to be effective, Vishera could restore at least some of AMD's competitiveness on the desktop.

2013 looks to be a very busy year for AMD, full of transitions to revamped CPU cores and new process technology. The "Kaveri" APU is scheduled to supplant Trinity, with up to four x86 processor cores based on "Steamroller," the continued evolution of the Bulldozer microarchitecture, and graphics based on the GCN architecture inside the Radeon HD 7000 series. Kaveri will include some special sauce for the APU-focused HSA programming model, and it will be one of several 2012 APUs fabricated at a 28-nm process node. For what it's worth, Dr. Su pegged Kaveri as the first APU with aggregate compute power in excess of a teraflop.

In the low-power domain, "Kabini" looks like the true spiritual successor to Krishna, a 28-nm APU with up to four enhanced "Jaguar" CPU cores and GCN-derived graphics. Kabini will also integrate south bridge I/O components, making it what Su called AMD's "first real SoC." Its sibling, "Tamesh," will inhabit the ULP domain, with only two CPU cores.

Notably, the roadmap shows no planned successor to "Vishera," the eight-core discrete desktop CPU. That probably means AMD's Socket AM3+ offerings will have to survive the duration of 2013 with the same silicon available at the end of 2012. The fate of AMD's products in this segment will most likely be determined by whatever AMD decides to do on the server front.

Speaking of which, here's a look at AMD's revised server plans. Notice that the 10-core "Sepang" processor and "Terramar," its dual-chip derivative, have been canceled and replaced with the 8-core "Seoul" and its dual-chip variant, "Abu Dhabi." Also notable by its absence is any mention of a transition to a new socket infrastructure. That means AMD's next round of server chips should slide into the same C32 and G34 sockets we've known for several years now.

Keeping these products at "only" 8/16 cores probably makes sense in the context of the current sockets' bandwidth limitations. Our larger concern is how AMD will remain competitive in the face of Intel's soon-to-be-released Sandy Bridge-EP processors. The desktop version of that chip is already incredibly formidable, and desktop workloads offer much less opportunity to flex the massive amounts of I/O bandwidth—40 lanes of PCI Express Gen3—connected to each socket of a Sandy Bridge-EP system. We can't talk about all of the details yet, but Intel appears to have captured some very nice power and performance benefits from the integration of high-speed I/O onto the processor die. AMD can't follow suit until it transitions to a new socket, and that evidently won't be happening before the end of 2013.

AMD still anticipates a future for its high-performance x86 CPU cores well beyond 2013, though, as illustrated by this slide showing, vaguely, how Opteron cores will evolve over time. Once we get to 2014 and beyond, we expect the direction set by the new executive team to begin taking hold in earnest. As that happens, AMD's server chip portfolio may expand to include some non-traditional products targeted at specific workloads. For a better sense of how AMD's roadmap might look into 2014 and beyond, we should look at what the company means when it says it's moving toward an SoC-style design methodology.