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AMD's A10-4600M 'Trinity' APU reviewed


The second-gen APU makes solid strides forward
— 1:55 AM on May 16, 2012

One of the big stories in PC processors over the past few years has been AMD's struggles to match the performance of Intel's high-end desktop CPUs. The much-anticipated "Bulldozer" microarchitecture landed with a thud, unable to mount a serious challenge to the dominance of Intel's Core i5 and i7 offerings. Meanwhile, Intel continues to crank out major improvements to these products at a pretty regular clip, as it did with the introduction of the 22-nm Ivy Bridge chips last month.

However, there is another, even bigger story unfolding in PC processors at the same time, and AMD plays a more intriguing role in it. As you may know, CPUs have swallowed up a whole host of other system components in the past few generations from the memory controller to I/O and graphics. The reasons for this trend are several. Integration can sometimes deliver higher performance—bringing the memory controller onboard provided a nice boost, for instance—but it can also cut costs, reduce the physical size of the platform, and improve power efficiency. With the rise of mobile computing, Intel and AMD have pushed ever closer to the ideal of a single-chip PC solution.

In that context, last year's introduction of the A-series processors, based on the chip code-named Llano, was a big stride forward for AMD. Llano achieved several important milestones at once. For one thing, it essentially matched Intel's competing products for battery run time; parity on this front had long eluded AMD. For another, Llano was the first AMD processor to incorporate the Radeon graphics technology the firm had acquired years before by purchasing ATI. As you might expect, Llano's graphics capabilities gave it instant credibility and a clear leg up on Intel's anemic integrated graphics processor (IGP). We liked the mobile Llano variant well enough to consider it a viable alternative to Intel's dual-core Sandy Bridge processors—perhaps even a superior choice for most folks, given the gap in graphics capabilities.

Llano had its limitations, though. The supply of 32-nm chips from AMD manufacturing partner GlobalFoundries was spotty for quite a while. The chip didn't translate well to desktop-class power envelopes, in our view. And it looked very much like a first-generation effort in a lot of ways. AMD talked endlessly about CPU-GPU "fusion" and dubbed the A-series products "APUs," for "accelerated processing units," but Llano stopped well short of making the IGP into a true co-processor.


A Trinity chip. Source: AMD.

Today, AMD is ready to take the next step with the introduction of the second-generation APU known as Trinity. Nearly everything about it is new, from the CPU cores to the IGP and the various bits of glue that hold everything together. The integration in Trinity is more mature, with more benefits and fewer visible seams between the processor's various components. Thus, although Trinity is manufactured using the same 32-nm SOI fabrication process as Llano, AMD claims Trinity doubles its predecessor's power-performance ratio. That claim takes several forms; most prominently, there is a 17W version of Trinity that purportedly performs like a 35W Llano variant. If true, AMD ought to have a very nice offering to slide into the ultra-thin laptops that are all the rage these days.


An overview of the Trinity die. Source: AMD.

The annotated image above points out Trinity's main components. The CPU portion of the chip includes four integer cores and two FPUs based on the "Bulldozer" microarchitecture. In fact, Trinity is the first chip to incorporate AMD's "Piledriver" architectural updates. More on those shortly. Also updated from Llano is Trinity's IGP, which is derived from the "Northern Islands" generation of Radeons. The memory controller remains a dual-channel affair, capable of supporting DIMMs up to 1866 MT/s, though 1600 MT/s is the top speed for mobile parts. Trinity's media processing block still decodes a host of video formats but has learned a new trick: hardware-accelerated H.264 encoding. And for communication with the outside world, the chip has 24 lanes of PCI Express Gen2 connectivity. Gone is the HyperTransport link used in AMD processors for ages; this chip talks to its Fusion Controller Hub I/O support chip via dedicated PCIe lanes, instead.

Code name Key
products
Cores Threads Last-level
cache size
Process node
(Nanometers)
Estimated
transistors
(Millions)
Die
area
(mm²)
Sandy Bridge Core i3, i5 2 4 4 MB 32 624 149
Sandy Bridge Core i5, i7 4 8 8 MB 32 995 216
Ivy Bridge Core i5, i7 4 8 8 MB 22 1400 160
Llano A4 2 2 1 MB x 2 32 758 -
Llano A8, A6, A4 4 4 1 MB x 4 32 1450 228
Trinity A10, A8, A6 4 4 2 MB x 2 32 1303 246

Trinity isn't an especially large chip, as these things go, but it is a little larger than Llano—despite a lower transistor count estimate—and it's quite a bit larger than the quad-core versions of Sandy and Ivy Bridge. Then again, the 22-nm Ivy Bridge quad is positively tiny.