Personal computing discussed
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Waco wrote:I'd be surprised if turbo clocks are north of 4.5 GHz.
Here is what I suspect it will end-up being based what we already know about Purely platform.
chuckula wrote:I'd be surprised if it boots successfully!
Krogoth said:Here is what I suspect it will end-up being based what we already know about Purely platform.
While the demo system used was a Purley motherboard I wouldn't be surprised if the commercial product ends up on the LGA-2011 platform. The same chips running on LGA-2011 now also slot into LGA-3647, so it's not unprecedented.
Krogoth wrote:chuckula wrote:I'd be surprised if it boots successfully!
Krogoth said:Here is what I suspect it will end-up being based what we already know about Purely platform.
While the demo system used was a Purley motherboard I wouldn't be surprised if the commercial product ends up on the LGA-2011 platform. The same chips running on LGA-2011 now also slot into LGA-3647, so it's not unprecedented.
Skylake-X XCC die is too large for Socket 2066 packaging which itself barely fits a Skylake-X HCC die. It has to be LGA 3647. You probably meant Socket 2066 since Socket 2011 is already phased out.
derFunkenstein wrote:Isn't AVX-512 the new hotness? I mean, as a competitive advantage. Why would Intel disable it?
Krogoth wrote:I highly doubt that Intel is going attempt to cram a Skylake-X XCC die in a Socket 2066 package. It is cheaper and easier for them to rebrand Xeon Platnium/Gold "rejects" and let motherboard vendors deal with hassle of making customer-tier LGA3647 boards.
It is essentially what AMD does with its Epyc "rejects". They keep the packaging but electrically axe half of the dice. It becomes a "Threadripper"
chuckula wrote:But go take a look at TR's benchmark suite and see what (if any) benchmarks can even try to use AVX-512 whatsoever [even inefficiently since AVX-512 can hurt performance if you don't use right... kinda like DX12]. From what I can tell, the absolute newest versions of AIDA-64 have finally introduced some AVX-512 support. Incidentally these versions of AIDA-64 were released earlier this year and many months after TR last reviewed a Skylake X part.
So basically, we have a very powerful feature that Intel loves to sell for high-performance computing but that the consumer market doesn't seem to care about. Turning it off to bring Skylake X to "parity" with EpycRipper is one way that Intel might segment the chips.
While I don't want Intel to do it, it's almost worth it to hear the screams of indignation against Intel from the exact same people who have been calling AVX-512 idiotic and praising AMD for not even considering AVX-512 support since 2016. I'll add it to the completely disingenuous screams of outrage we heard when some Haswell parts didn't support TSX in 2013 (and Epyc doesn't support TSX in 2018 but suspiciously the same people didn't complain about it). Incidentally, TSX does have uses even for consumer programs.
Waco wrote:I'd be surprised if turbo clocks are north of 4.5 GHz.
Krogoth wrote:Intel will achieve its marketing 5.0Ghz Q4 2018 goal set in E3 stunt demo by making it turbo speed on the XE SKU under single and dual-threaded loads.
Waco wrote:Krogoth wrote:Intel will achieve its marketing 5.0Ghz Q4 2018 goal set in E3 stunt demo by making it turbo speed on the XE SKU under single and dual-threaded loads.
I'm still gonna be surprised if it's that high. It takes a reasonably high amount of voltage to get those clocks stable in all workloads (and if I recall correctly it's above the "recommended max" that Intel specifies).
Waco wrote:Krogoth wrote:Intel will achieve its marketing 5.0Ghz Q4 2018 goal set in E3 stunt demo by making it turbo speed on the XE SKU under single and dual-threaded loads.
I'm still gonna be surprised if it's that high. It takes a reasonably high amount of voltage to get those clocks stable in all workloads (and if I recall correctly it's above the "recommended max" that Intel specifies).
Krogoth wrote:Waco wrote:Krogoth wrote:Intel will achieve its marketing 5.0Ghz Q4 2018 goal set in E3 stunt demo by making it turbo speed on the XE SKU under single and dual-threaded loads.
I'm still gonna be surprised if it's that high. It takes a reasonably high amount of voltage to get those clocks stable in all workloads (and if I recall correctly it's above the "recommended max" that Intel specifies).
If Intel is confident enough to release 8086K with a 5.0Ghz single-core turbo for ethusaist/epenis crowd. They'll certainly do it for XE version of Skylake-X XCC silicon. It'll give marketing types bragging rights "we have the fastest clockspeed* on a HEDT-tier CPU!"