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JustAnEngineer
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5 nm chips in 2020

Thu Sep 26, 2019 8:13 pm

https://www.techpowerup.com/259536/tsmc ... ps-in-2020
According to DigiTimes, TSMC will begin mass production of its 5 nm node in March 2020, when companies using the 5 nm PDK can tape out their designs and integrate them into future products.
Consider that we didn't get mainstream 7 nm CPUs and GPUs until mid-2019. If 5 nm is two years behind that process, then we may see new 5 nm CPUs and GPUs in 2021.
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Re: 5 nm chips in 2020

Fri Sep 27, 2019 8:58 am

JustAnEngineer wrote:
https://www.techpowerup.com/259536/tsmc-to-begin-mass-production-of-5nm-chips-in-2020
According to DigiTimes, TSMC will begin mass production of its 5 nm node in March 2020, when companies using the 5 nm PDK can tape out their designs and integrate them into future products.
Consider that we didn't get mainstream 7 nm CPUs and GPUs until mid-2019. If 5 nm is two years behind that process, then we may see new 5 nm CPUs and GPUs in 2021.


Sounds reasonable. Allegedly Intel will be introducing their 7nm process (analogous to TSMC 5nm) at about the same time, along with their 10++:

https://www.anandtech.com/show/14312/in ... chnologies

Of course, that's not exactly an apples-to-apples comparison. TSMC will be a year ahead of Intel on the learning curve for that new process.

In a way, the smartphone might be the best thing that ever happened to AMD.
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Re: 5 nm chips in 2020

Wed Oct 23, 2019 5:08 pm

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Re: 5 nm chips in 2020

Fri Oct 25, 2019 5:07 am

TSMC plans to begin constructing a facility for 3 nm fabrication at the end of this year.
https://www.techpowerup.com/260464/tsmc ... nstruction
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 6:49 am

JustAnEngineer wrote:
TSMC plans to begin constructing a facility for 3 nm fabrication at the end of this year.
https://www.techpowerup.com/260464/tsmc ... nstruction


Hmm... I thought Moore's Law was dead, but maybe it's just dead at Intel?
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 7:50 am

3nm is nuts. We're talking components less than a couple of dozen silicon atoms wide. :o
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 8:00 am

blastdoor wrote:
JustAnEngineer wrote:
TSMC plans to begin constructing a facility for 3 nm fabrication at the end of this year.
https://www.techpowerup.com/260464/tsmc ... nstruction


Hmm... I thought Moore's Law was dead, but maybe it's just dead at Intel?


Let's not declare 3nm as viable until we actually get shipping parts.

Remember that GF announced 7nm a few years ago, but then in 2018 they cancelled it. Just because TSMC is working on 3nm doesn't mean they'll actually be able to ship it. As JBI says, that's only a few atoms across, so quantum effects are going to be a significant challenge (how do you actually get a switch to work if the electrons can just quantum tunnel through the OFF position?)
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 8:14 am

If we stay with silicon, I suspect the next big breakthrough needs to be 3D circuits. We're approaching the limits of physics for 2D silicon circuits.

Flash already went 3D, so we know how to build multilayer chips. The hard part will be doing it for something with a less regular layout like a CPU.
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 9:05 am

just brew it! wrote:
3nm is nuts. We're talking components less than a couple of dozen silicon atoms wide.

But the numeric titles don't relate much to actual feature sizes anymore.

needs to be 3D circuits.

Dies are already a few layers. I wonder if the problem with die-stacking is heat.
 
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 9:25 am

meerkt wrote:
just brew it! wrote:
3nm is nuts. We're talking components less than a couple of dozen silicon atoms wide.

But the numeric titles don't relate much to actual feature sizes anymore.

True. But it's still supposed to have at least some relationship to the smallest features etched on the chip, right? FWIW that page you linked indicates that while the transistors themselves are much larger, the fins on TSMC's 7nm FinFETs are 6nm wide.

meerkt wrote:
needs to be 3D circuits.

Dies are already a few layers. I wonder if the problem with die-stacking is heat.

I would not be surprised if that's part of it. In which case there would need to be additional breakthroughs in die cooling. Maybe microchannels and phase change liquid coolant within the chip itself to help move the heat from the interior to the surface of the chip?
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 9:47 am

Doesn't seem closely related to the titular names. 6nm fin width is the same as in TSMC's 10nm process. The same parameter in Intel's 14nm process is 8nm.

I'm guessing fin pitch is more important. In TSMC's 10nm fin it's 36nm, compared to Intel's 14nm with 42nm.

And then, maybe Contact Gate Pitch and Minimum Metal Pitch are even more important? :) If so, Intel's 10nm (CPP=54nm, MMP=36nm) is better than TSMC's 7nm (CPP=55nm, MMP=40nm). There's some contradictory data about that, and more general information, near the table here titled "Comparing Different Process Nodes
CPPxMMP"
 
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 10:04 am

Well, whatever you call what TSMC is doing these days, it seems to be effective!
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 10:36 am

meerkt wrote:
Dies are already a few layers. I wonder if the problem with die-stacking is heat.

All procesing logic is manufactured on the substrate - I'm not aware of any exceptions. Every single transistor is made up of several layers of course, but there aren't any transistors on top of other transistors.

Hmm, but what about the last level cache? It could be a good candidate for layered manufacturing.
 
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 10:42 am

Wirko wrote:
Hmm, but what about the last level cache? It could be a good candidate for layered manufacturing.

That's what I was thinking. Since it worked well for flash, maybe it would be possible to do it for SRAM arrays as well? And cache does account for a fair amount of the die area.
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 12:45 pm

K-L-Waster wrote:
blastdoor wrote:
JustAnEngineer wrote:
TSMC plans to begin constructing a facility for 3 nm fabrication at the end of this year.
https://www.techpowerup.com/260464/tsmc ... nstruction


Hmm... I thought Moore's Law was dead, but maybe it's just dead at Intel?


Let's not declare 3nm as viable until we actually get shipping parts.

Remember that GF announced 7nm a few years ago, but then in 2018 they cancelled it. Just because TSMC is working on 3nm doesn't mean they'll actually be able to ship it. As JBI says, that's only a few atoms across, so quantum effects are going to be a significant challenge (how do you actually get a switch to work if the electrons can just quantum tunnel through the OFF position?)


Yeah, but GF didn't have the high-volume, high-margin customers that TSMC has. TSMC has Apple, Huwaei, Qualcomm, and AMD. GF had AMD and... chirp, chirp.

Unless the People's Liberation Army upsets the apple cart, I'd think TSMC will be the last to stop investing in new nodes. I'd say either Samsung or Intel is much more likely to be the next to fall.
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 1:07 pm

I think the 3 are here to stay. The US wouldn't want to be left without native manufacturing capabilities. And Samsung, although more likely, are still big enough to not want to be at the mercy of others.

Wirko wrote:
Every single transistor is made up of several layers of course, but there aren't any transistors on top of other transistors.

Perhaps. But if it's already made up of layers, anything prevents stacking actual logic?

Broadwell 14nm is supposedly 13 layers:
Image
 
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 1:26 pm

At what point do we need to figure out Star Trek replicators to fashion ever-smaller and 3D processor layouts? Each new layer mask will inevitably go wrong at at least one spot on the wafer, meaning that usable yield approaches zero as the number of layers increase.
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 1:54 pm

Add redundant circuits, or perhaps there's a way to make circuits that are more inherently "statistical".
 
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 3:16 pm

meerkt wrote:
Add redundant circuits, or perhaps there's a way to make circuits that are more inherently "statistical".

What's the point of shrinking the circuits if you need 3 copies of them to make it reliable? (Having 2 isn't good enough, since then if they disagree you don't know which one is right; with 3 of them, "majority rules".)
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 4:35 pm

Obviously you won't spend all your shrink-gained extra transistors on redundancy. It seems it's been a research topic for many years now, and I guess that implies some techniques have graduated to active use.

Nothing terribly illuminating, but some random hits:

https://www.reddit.com/r/askscience/com ... s/c4kerka/
http://citeseerx.ist.psu.edu/viewdoc/do ... 1&type=pdf
https://ieeexplore.ieee.org/document/7480788
 
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 6:32 pm

blastdoor wrote:
Yeah, but GF didn't have the high-volume, high-margin customers that TSMC has. TSMC has Apple, Huwaei, Qualcomm, and AMD. GF had AMD and... chirp, chirp.


Did GF just run out of money, or did they find they had been going down a failed path and not have enough money to restart from the beginning? If it was the latter, it's not impossible for the same thing to happen to TSMC, or Samsung... arguably you could say it already happened to Intel.

Point is, there's no guarantee that TSMC will succeed at any of these nodes. As JBI said, this stuff is hard. Somewhere along the line, there will be a process node that is too hard for anyone to succeed at. If nothing else, you absolutely positively cannot make a chip with features smaller than the atoms your circuits are made at -- and most likely, the limit for mass produced parts is going to be a few iterations before that. We don't yet know where the end will be, but it can't be too many shrinks away.
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Re: 5 nm chips in 2020

Fri Oct 25, 2019 9:25 pm

K-L-Waster wrote:
Did GF just run out of money, or did they find they had been going down a failed path and not have enough money to restart from the beginning? If it was the latter, it's not impossible for the same thing to happen to TSMC, or Samsung... arguably you could say it already happened to Intel.

This is speculation on my part, but my guess is that it was some combination of being heavily invested in SOI (a niche and expensive process which ended up being difficult to scale to smaller process nodes), and their primary customer being AMD (who did not have a strong enough CPU design to move product in the volumes needed to generate enough revenue for them to reinvest in staying current).
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Re: 5 nm chips in 2020

Sat Oct 26, 2019 6:52 am

K-L-Waster wrote:
blastdoor wrote:
Yeah, but GF didn't have the high-volume, high-margin customers that TSMC has. TSMC has Apple, Huwaei, Qualcomm, and AMD. GF had AMD and... chirp, chirp.


Did GF just run out of money, or did they find they had been going down a failed path and not have enough money to restart from the beginning? If it was the latter, it's not impossible for the same thing to happen to TSMC, or Samsung... arguably you could say it already happened to Intel.

Point is, there's no guarantee that TSMC will succeed at any of these nodes. As JBI said, this stuff is hard. Somewhere along the line, there will be a process node that is too hard for anyone to succeed at. If nothing else, you absolutely positively cannot make a chip with features smaller than the atoms your circuits are made at -- and most likely, the limit for mass produced parts is going to be a few iterations before that. We don't yet know where the end will be, but it can't be too many shrinks away.


Good point — eventually nobody will be able to keep following this path. I’m just saying that I think TSMC will be the last company to give up.
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Re: 5 nm chips in 2020

Fri Dec 06, 2019 5:33 pm

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Re: 5 nm chips in 2020

Fri Dec 06, 2019 7:51 pm

Rumor is that 5nm test runs are already yielding better than 7nm: https://wccftech.com/amd-zen-4-5-nm-launching-2021/

I find that a little hard to believe, but if it is anywhere close to being true, that bodes well for next-gen AMD parts.
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Re: 5 nm chips in 2020

Mon Dec 09, 2019 8:26 am

just brew it! wrote:
Rumor is that 5nm test runs are already yielding better than 7nm: https://wccftech.com/amd-zen-4-5-nm-launching-2021/

I find that a little hard to believe, but if it is anywhere close to being true, that bodes well for next-gen AMD parts.


Maybe the explanation is EUV.

Allegedly Intel will reach 7nm in 2021, so perhaps that will be the year they catch up to AMD.
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Re: 5 nm chips in 2020

Mon Dec 09, 2019 10:21 am

blastdoor wrote:
just brew it! wrote:
Rumor is that 5nm test runs are already yielding better than 7nm: https://wccftech.com/amd-zen-4-5-nm-launching-2021/

I find that a little hard to believe, but if it is anywhere close to being true, that bodes well for next-gen AMD parts.

Maybe the explanation is EUV.

I believe TSMC's 7nm process is already on EUV.
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Re: 5 nm chips in 2020

Mon Dec 09, 2019 11:35 am

just brew it! wrote:
blastdoor wrote:
just brew it! wrote:
Rumor is that 5nm test runs are already yielding better than 7nm: https://wccftech.com/amd-zen-4-5-nm-launching-2021/

I find that a little hard to believe, but if it is anywhere close to being true, that bodes well for next-gen AMD parts.

Maybe the explanation is EUV.

I believe TSMC's 7nm process is already on EUV.


it is not.
7+ from tsmc will be EUV when it arrives.

Zen 3000 series chips use 7nm process but I dunno if zen 4 will be 7+ or 5nm at this point because of how well the 5nm process is rumored to work.
Scuttlebutt is that AMD is amongst the first run customers for 5nm...
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Re: 5 nm chips in 2020

Tue Dec 10, 2019 8:20 am

 
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Re: 5 nm chips in 2020

Tue Dec 10, 2019 9:10 am

Aranarth wrote:
just brew it! wrote:
I believe TSMC's 7nm process is already on EUV.

it is not.
7+ from tsmc will be EUV when it arrives.

Ahh, guess I got 7 confused with 7+!
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