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joyleewong
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Cost Model for Solid State Components

Tue Feb 27, 2018 10:10 am

Does anyone know of a cost model that predicts pricing trends for solid state components?
 
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Re: Cost Model for Solid State Components

Tue Feb 27, 2018 10:56 am

It's supply and demand. Given that large price swings tend to be due to external events that affect production (floods, fires, earthquakes), or unexpected changes in demand (the sudden massive surge in crypto-currency mining), I'd trust any such model about as far as I could throw it.
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DPete27
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Re: Cost Model for Solid State Components

Tue Feb 27, 2018 11:32 am

At least taking the past 4-ish years as an indicator of prices stagnating, it looks like we've settled in on ~$0.30/GB as an average for SSDs.

JBI covered supply "issues" (real or fake).
Obviously there are advancements in the tech (whose cost needs to be recouped of course) in terms of: bits/cell (SLC/MLC/TLC/QLC), process node size, 3D NAND, etc etc to pack more capacity into the same/less hardware which [in theory] reduces cost/GB.
Then there's the advent of M.2 form factor SSDs in lieu of the stalwart 2.5" enclosure. Ditching the [typically aluminum] enclosure reduces the BoM, and the smaller size should reduce shipping costs.
Of course, regardless of all those things, there's performance. Sure, today's 3D TLC NAND M.2 SSDs are theoretically cheaper than ever to produce, but now that we've unleashed their next level of performance via NVMe, manufacturers are charging proportionally for performance. I can't believe that the cost difference between a SATA M.2 SSD and a NVMe M.2 SSD of equal capacity is much more than a few pennies at best, and yet, because of the performance difference, manufacturers can charge a premium.
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defaultluser
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Re: Cost Model for Solid State Components

Tue Feb 27, 2018 1:58 pm

The cost of the newest semiconductor process nodes is becoming more expensive than previous nodes. This runs contrary to older process shrinks, where the investment cost was more than paid-off by greater density and performance. You can't pay these off unless you charge premium wafer prices for longer periods.

So, instead of fab processes being replaced every 18 months, they're taking twice that long. And charging premium prices. That will never go away.

Building a new fab from-the-ground-up takes several years, and 5-10 Billion dollars, so that's not going to help us with TODAY's supply crunch :D

There's a sudden spike in semiconductor demand just when things are getting EXTREMELY EXPENSIVE to improve the tech making the parts. So prices have gone way up. The industry will eventually catch-up, with these fabs operating at capacity.
 
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Re: Cost Model for Solid State Components

Wed Feb 28, 2018 11:00 am

If you actually want to understand why Semi costs are going up, it's because EUV has been "just around the corner" for years. And costs/issues keep climbing.

https://arstechnica.com/gadgets/2018/02 ... bricating/

This article and ESPECIALLY the comments go into detail.
 
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Re: Cost Model for Solid State Components

Wed Feb 28, 2018 1:09 pm

It's odd to me that there's still a process node race on flash NAND when we can already pack 400GB of storage on a postage stamp and can get up to 31TB in a 2.5" enclosure. Especially with the diminishing returns of planar density and fragility of smaller process nodes, it seems the more efficient solution would be to focus on increasing production to lower unit costs.
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Re: Cost Model for Solid State Components

Wed Feb 28, 2018 1:29 pm

DPete27 wrote:
It's odd to me that there's still a process node race on flash NAND when we can already pack 400GB of storage on a postage stamp and can get up to 31TB in a 2.5" enclosure. Especially with the diminishing returns of planar density and fragility of smaller process nodes, it seems the more efficient solution would be to focus on increasing production to lower unit costs.

They're aggressively pursuing both as both increase profits.
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defaultluser
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Re: Cost Model for Solid State Components

Wed Feb 28, 2018 1:42 pm

DPete27 wrote:
It's odd to me that there's still a process node race on flash NAND when we can already pack 400GB of storage on a postage stamp and can get up to 31TB in a 2.5" enclosure. Especially with the diminishing returns of planar density and fragility of smaller process nodes, it seems the more efficient solution would be to focus on increasing production to lower unit costs.



They already do that. Fabs are mass-production assembly-line machines. That's why the world can satisfy it's silicon hunger with well under 500 of them.

https://en.wikipedia.org/wiki/List_of_s ... lants#Open

Most modern fabs have a capacity of 50000 wafers/month OR MORE. They run 24/7, so that's about one wafer PER MINUTE. And each wafer typically has hundreds of chips on it. You really can't expect to do the complex multi-patterning steps needed for modern chips in less than a minute.

They keep pushing process tech because whoever can pack more bits onto a memory chip can reap the highest profits. Less-advanced fabs could have to sell their chips at a loss, and go out-of-business.

The problem is that, up until five years ago (smart phone revolution), silicon demand was very hard to predict. But now it's solid, so companies can finally afford to open more fabs...you just have to WAIT five years from today, when they are up-and-running :(

It sucks having to wait so long for more production capacity.
 
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Re: Cost Model for Solid State Components

Wed Feb 28, 2018 10:47 pm

defaultluser wrote:
DPete27 wrote:
It's odd to me that there's still a process node race on flash NAND when we can already pack 400GB of storage on a postage stamp and can get up to 31TB in a 2.5" enclosure. Especially with the diminishing returns of planar density and fragility of smaller process nodes, it seems the more efficient solution would be to focus on increasing production to lower unit costs.



They already do that. Fabs are mass-production assembly-line machines. That's why the world can satisfy it's silicon hunger with well under 500 of them.

https://en.wikipedia.org/wiki/List_of_s ... lants#Open

Most modern fabs have a capacity of 50000 wafers/month OR MORE. They run 24/7, so that's about one wafer PER MINUTE. And each wafer typically has hundreds of chips on it. You really can't expect to do the complex multi-patterning steps needed for modern chips in less than a minute.


The catch here is that for state of the art logic, the time it takes to complete a wafer has been increasing due to multi-patterning. This affects CPU/GPU/SoC than memory, but even then the memory processes are starting to utilize them.

The other factor is that the average die size of components has been creeping upward. Multicore ( >=4) is really starting to take off as it is clear that is the easiest means of increasing theoretical peak performance with in a power budget which requires more die space. Ditto for coprocessors on SoCs.

defaultluser wrote:
They keep pushing process tech because whoever can pack more bits onto a memory chip can reap the highest profits. Less-advanced fabs could have to sell their chips at a loss, and go out-of-business.

The problem is that, up until five years ago (smart phone revolution), silicon demand was very hard to predict. But now it's solid, so companies can finally afford to open more fabs...you just have to WAIT five years from today, when they are up-and-running :(

It sucks having to wait so long for more production capacity.


The real factor here is that 450 mm wafers were supposed to be common place for state-of-the-art fabs right now to offset the delays caused by multi-patterning. The fab costs for this generation of equipment was too astronomical for deployment when there were other high cost initiatives to tackle (EUV).
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