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dragontamer5788
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AMD Navi / RDNA Topic

Tue May 28, 2019 2:17 pm

With Computex's announcement of AMD 5700 GPUs, more and more information is trickling in about Navi. So I think its about time to start a topic, even if its still mostly speculation.

The "hard information" from Computex so far is: https://www.anandtech.com/show/14412/am ... roved-perf

* July Launch date
* "RDNA" architecture -- No idea if this is a "major" change from GCN, or if its just a new name.
* GDDR6
* New cache hierarchy
* Still 64 stream processors per CU (rumor was that this number changed. So this tidbit kills a few rumors I've seen around Twitter / Reddit)

Again: not much to go on yet, despite the architecture launching within two months of now. Anyone else got interesting tidibts they'd like to share?
 
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Re: AMD Navi / RDNA Topic

Tue May 28, 2019 2:27 pm

Interesting, but not surprising, that they gave up on HBM on the consumer cards. Will be curious if the FirePro market's keep it. I'm guessing yes.
 
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Re: AMD Navi / RDNA Topic

Tue May 28, 2019 2:54 pm

HBM doesn't easily scale down which is why it is poorly suited for lesser SKUs. It only scales upward if need extra bandwidth and capacity both only make sense for HPC/professional graphics world. That's why Nvidia has never bother to make a non-HPC/professional graphics SKUs with HBM memory. AMD RTG didn't have capital to make dedicated HPC/professional and pure gaming SKUs. They opted for HBM2 route to secure HPC/professional sales and "rejects" got sold as high-end gaming parts.

As far as RDNA is concerned. I suspect that Navi will end-up being another derivative of GCN that will implement ideas that are basis on AMD's post-GCN designs. There was some rumors circulating around that Navi might be doubling the width of SIMDs which will help alleviate some of the geomertic bottlenecks that has been plaguing current GCN designs.
Last edited by Krogoth on Tue May 28, 2019 3:05 pm, edited 1 time in total.
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Re: AMD Navi / RDNA Topic

Tue May 28, 2019 3:02 pm

Usacomp2k3, are you basing that HBM comment on actual info?

HBM was only paired with the 2 biggeest GPUs that AMD/ATI made (ever, AFAIK; I've not seen much info on the die size of GPUs prior to the unified shader era...) and the die shrink of one of those.

This GPU ain't in that class, it's a solid mid-ranger in size and economic position.
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Re: AMD Navi / RDNA Topic

Tue May 28, 2019 3:46 pm

Topinio wrote:
Usacomp2k3, are you basing that HBM comment on actual info?

HBM was only paired with the 2 biggeest GPUs that AMD/ATI made (ever, AFAIK; I've not seen much info on the die size of GPUs prior to the unified shader era...) and the die shrink of one of those.

This GPU ain't in that class, it's a solid mid-ranger in size and economic position.


The other HBM GPUs I know of are AMD Fury, and the franken-chip HBM2 Skull Canyon AMD+Intel project.

Skull Canyon was aiming at laptops, which is probably why HBM2 was used instead of GDDR6. HBM2 is far more power efficient.
 
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Re: AMD Navi / RDNA Topic

Tue May 28, 2019 3:52 pm

The difference in power consumption probably played a role in Fury also. An extra 20 watts or so wasn't in the cards(geddit??) for that one either.
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Re: AMD Navi / RDNA Topic

Tue May 28, 2019 9:11 pm

I wonder if the Navi / RNDA design will be any good at ray tracing. I say this because Quake will release a June 06 update that includes ray tracing and so for the next TR review it would be a hoot to include the Quake benchmark.
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Re: AMD Navi / RDNA Topic

Tue May 28, 2019 10:34 pm

Mr Bill wrote:
I wonder if the Navi / RNDA design will be any good at ray tracing. I say this because Quake will release a June 06 update that includes ray tracing and so for the next TR review it would be a hoot to include the Quake benchmark.


That's fairly old hat though. A bunch of 3D hobbyist have already toyed around ray-tracing/path-tracing under Quake 1/2 a few years back.
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Re: AMD Navi / RDNA Topic

Wed May 29, 2019 5:53 am

The Computex RDNA announcement debunks a few rumours but the main one is that Navi is a major architectural change, when linux drivers popped up indicating that Navi would be GCN5.

AMD are citing a 25% IPC improvement which removes the 7nm clock improvements from the equation. The 25% has to be architectural - whether that's more ROPs, an increase on the 4 Geometry Processor limit of previous GCN iterations, extra cache, or a drastic change to existing GCN architecture.

Until AMD's official launch or a deep dive they release into Navi's architecture, we're still left speculating on whether Navi is truly new architecture, GCN5, or something inbetween.

I think it was confirmed that Navi will be a 40CU (so 2560-shader) part by Lisa Su or one of the AMD speakers last week, and combined with the expected clocks of TSMC's 7nm (1600MHz+), the 25% IPC increase, and existing Polaris performance, we can see how around an RTX 2070 for Navi XT and Vega for Navi Pro is a reasonable and believable expectation.
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Re: AMD Navi / RDNA Topic

Wed May 29, 2019 6:20 am

Topinio wrote:
Usacomp2k3, are you basing that HBM comment on actual info?

Just the switch to GDDR6 kinda precludes the use of HBM. I guess they could, in theory, go with a dual memory architecture and treat the HBM like local cache, but I kind of doubt it.
 
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Re: AMD Navi / RDNA Topic

Wed May 29, 2019 6:44 am

Usacomp2k3 wrote:
Just the switch to GDDR6 kinda precludes the use of HBM. I guess they could, in theory, go with a dual memory architecture and treat the HBM like local cache, but I kind of doubt it.

Eh?

I was asking about your comment:
Usacomp2k3 wrote:
Interesting, but not surprising, that they gave up on HBM on the consumer cards. Will be curious if the FirePro market's keep it. I'm guessing yes.

because I haven't see any evidence that AMD has given up on HBM for all its consumer cards, and wondered if you had.

HBM is what they used on Fiji, the biggest chip they ever made at 596 mm2, and Vega 10, the second biggest at 486 mm2.

They were using GDDR5 on everything smaller. This one is much smaller, Ryan Smith at Anandtech is estimating 275 mm2, so its use of GDDR6 shouldn't surprise anyone and doesn't mean that AMD has given up on using HBM in its consumer cards -- we won't see the next high-end big chip one of those for a while.
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Re: AMD Navi / RDNA Topic

Wed May 29, 2019 6:47 am

Gotcha. Then no, I have no info on that. I don't know that the Radeon VII is really a "consumer" chip. Maybe pro-sumer. We'll see what they have as a follow-up to big Vega. Maybe Navi+
 
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Re: AMD Navi / RDNA Topic

Wed May 29, 2019 7:35 am

Usacomp2k3 wrote:
Gotcha. Then no, I have no info on that. I don't know that the Radeon VII is really a "consumer" chip. Maybe pro-sumer. We'll see what they have as a follow-up to big Vega. Maybe Navi+

Eh, I definitely count it as consumer, I'd only count the Radeon Vega Frontier Edition as prosumer. (From AMD; from NVIDIA, it's probably fine to call the TITAN range prosumer.)

If Navi looks this good at only 275 mm2, I can't wait for a 450-600 mm2 one!
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Re: AMD Navi / RDNA Topic

Sat Jun 01, 2019 6:44 pm

https://www.phoronix.com/forums/forum/p ... -mesa-19-2

Some news from the phoronix forums. Apparently, an AMD developer has been doing some question / answers.

You could call it a hybrid but not in that sense... we used to talk about GCN as an ISA, but it seems that most people outside AMD think of GCN as a micro-architecture instead (ie an implementation of the ISA). RDNA is GCN ISA but not what you think of as GCN architecture.


Unfortunately...

Can you delve into this a bit deeper? There's very little actual information about Navi.

Sorry, but not yet. I think the next level of detail will come out around E3.


So RDNA is considered to be a new microarchitecture by AMD Devs, although it has the same GCN Assembly language. More information to come at E3 (maybe)
 
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Re: AMD Navi / RDNA Topic

Sat Jun 01, 2019 8:33 pm

The distinction between ISA and architecture isn't really something I've thought about with GPUs before, so that's interesting. I suppose it's possible to make changes to the ISA, and have differences between the instructions for GPUs from AMD and Nvidia since there's a driver inbetween the GPU and anything that wants to use it. I wonder how far they can realistically go with that though. It sounds like asking for trouble if you start adding stuff that can't easily be exposed through DX12, or whatever API developers will be using.

I think the question most people had with AMD said "yay! RDNA!", was "what the hell is that?". From the sounds of this we should be leaning towards "not another re-re-refresh" instead of "old stuff with a new name".
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Re: AMD Navi / RDNA Topic

Sat Jun 01, 2019 9:33 pm

It sounds like GCN to RDNA is like the difference between Fermi to Kepler. The underlying foundations are the same but resource allocation of the blocks are a bit different. It seems like the hutch that Navi will end-up being a cheaper to make Vega 56/64 seems be on target.
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Re: AMD Navi / RDNA Topic

Sun Jun 02, 2019 12:54 am

Redocbew wrote:
The distinction between ISA and architecture isn't really something I've thought about with GPUs before, so that's interesting. I suppose it's possible to make changes to the ISA, and have differences between the instructions for GPUs from AMD and Nvidia since there's a driver inbetween the GPU and anything that wants to use it. I wonder how far they can realistically go with that though. It sounds like asking for trouble if you start adding stuff that can't easily be exposed through DX12, or whatever API developers will be using.

I think the question most people had with AMD said "yay! RDNA!", was "what the hell is that?". From the sounds of this we should be leaning towards "not another re-re-refresh" instead of "old stuff with a new name".


GCN1.2 changed opcodes and stuff, but the overall assembly language is roughly the same.

GCN1.5 (aka Vega) added new registers (SGPRs in particular), but otherwise is backwards compatible to GCN 1.4. SGPRs are used for booleans, for program-counter stuff (stack, jumps, etc. etc.), and some constants ("Konst" memory in AMD talks). And of course, FP16 instructions were added.

So the ISA has been changing. Like actual opcodes have changed. So the GCN ISA isn't as well defined as x86 in general.
 
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Re: AMD Navi / RDNA Topic

Mon Jun 10, 2019 5:40 pm

AMD's E3 event: https://www.youtube.com/watch?v=yxPBXNuX6Xs

First chunk is Zen2 stuff. Volume was very quiet for me and hard to hear, kind of a bad stream all else considered.

For the purposes of this topic:

* AMD RX 5700 XT
* 40 Compute Units
* 9.75 TFlops
* 8GB GDDR6
* 1605 base to 1905 Boost clock
* 1x8pin + 1x6-pin
* Reference blower design
* World War Z demo (RTX 2070 == 102 FPS / RX 5700 XT == 117 FPS). 1440p Ultra
* $449

-------

* AMD RX 5700: 36 Compute Units / 7.95 TFLOPs / 8GB GDDR6.
* Compares vs 2060 @ 1440 Max Settings Apex Legends. 72 FPS vs 88 FPS.
* $379

Not much detail on RDNA aside from "its better trust us". They also announced an anti-lag feature, which sounds pretty awesome IMO. With 40 new compute units, they're apparently reaching RTX 2070 levels, so it seems like RDNA is definitely a major improvement. I'd still want to have the developer docs for the architecture, lol.
 
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Re: AMD Navi / RDNA Topic

Mon Jun 10, 2019 6:26 pm

Cheaper to make Vega 64/56 replacements confirmed. Nvidia is going most likely counter with a speedbumped TU106 (2060Ti/2060 Super?) and binned TU104 SKUs (2070Ti). It seems like Navi has tweaks that remedy some architectural bottlenecks plus clockspeed boost from TSMC's 7nm process if a 40CU/32CU is able to rival the larger, older Vega 10-based units. I doubt it'll translate as well when scaled up to a 56/64CU design to justify the extra costs.
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Re: AMD Navi / RDNA Topic

Tue Jun 11, 2019 12:01 pm

Hot Hardware posted the following slide:

Image

* Size 32 Wavefronts (!!!), I thought that leak was fake, but AMD really was working on it.
* 2x SALUs per compute unit now
* L0 / L1 / L2 cache (strange that they went with that convention instead of L1 / L2 / L3...). So GPUs go from 2-tier to 3-tier cache system.

That is a very substantial change to the fundamental core of AMD's GPUs. Its definitely a new day. I can see why its still "GCN assembly", its just going to be faster now. I'm kinda surprised that these changes were all that were needed to make it gain so much IPC. I guess that 512kB "L1" (middle-tier cache) really helps.
 
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Re: AMD Navi / RDNA Topic

Tue Jun 11, 2019 12:22 pm

Sounds like wafefront = SIMD = 32 is the only notable improvement in RDNA at this point.... Not sure if the cache stuff will be significant. Take away the clockspeed increase afforded by the 7nm process and I'd be interested to see what kind of PURE architectural improvements they've managed vs the RX480/RX580/RX590 Polaris cards.
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Re: AMD Navi / RDNA Topic

Tue Jun 11, 2019 12:26 pm

DPete27 wrote:
Sounds like wafefront = SIMD = 32 is the only notable improvement in RDNA at this point.... Not sure if the cache stuff will be significant. Take away the clockspeed increase afforded by the 7nm process and I'd be interested to see what kind of PURE architectural improvements they've managed vs the RX480/RX580/RX590 Polaris cards.


Doubling the sALUs is a big improvement as well. The sALUs is the unit that handles if-statements, loops, and other constructs in the code. Any code with "complex" if statements and loops will benefit from that change.

I guess shader code uses more if-statements / loop statements than I was expecting.
 
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Re: AMD Navi / RDNA Topic

Tue Jun 11, 2019 12:49 pm

Infinity fabric seems to suggest that AMD RTG might go back to CF on a stick as a Radeon VII replacement for the high-end gaming market.
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Re: AMD Navi / RDNA Topic

Tue Jun 11, 2019 12:52 pm

Think they're using tile-based rasterization yet?
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Re: AMD Navi / RDNA Topic

Tue Jun 11, 2019 1:22 pm

I'd like to see more about ray tracing. Microsoft said Project Scarlet will do ray tracing. So when does that come if not now? Does it support it in hardware or is there another architecture/tweak to this coming?
 
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Re: AMD Navi / RDNA Topic

Tue Jun 11, 2019 1:23 pm

Krogoth wrote:
Infinity fabric seems to suggest that AMD RTG might go back to CF on a stick as a Radeon VII replacement for the high-end gaming market.

Like the Mac Pro config? What GPU was in that? They specifically said Infinity fabric on their announcement.
 
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Re: AMD Navi / RDNA Topic

Tue Jun 11, 2019 3:16 pm

DragonDaddyBear wrote:
Krogoth wrote:
Infinity fabric seems to suggest that AMD RTG might go back to CF on a stick as a Radeon VII replacement for the high-end gaming market.

Like the Mac Pro config? What GPU was in that? They specifically said Infinity fabric on their announcement.

Vega 20, I believe, same thing that's in the Radeon VII and the Radeon Instinct MI60 and MI50 boards.

I don't believe anyone is going for a multi-GPU board for gamer cards, it's past its time long since.
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Re: AMD Navi / RDNA Topic

Tue Jun 11, 2019 3:56 pm

There were two issues with CF/SLI
1) RAM didn't pool
2) bandwidth

In theory it's possible both are addressable with IF. I believe NVLink does this, but, in typical NVidia fashion, the consumer cards are crippled/not designed (I think its the later in this case) as the super high-end stuff.
 
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Re: AMD Navi / RDNA Topic

Tue Jun 11, 2019 5:10 pm

I'd expect this idea to be firmly in the realms of 'shyeah right, and monkeys might fly out of my butt'.

For the workloads that a Mac Pro needs GPU horsepower, sure, why not (sometimes); for gaming, nope, that was a dead horse before they tried flogging the R9 295.
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Re: AMD Navi / RDNA Topic

Tue Jun 11, 2019 7:32 pm

Actually, CF/SLI might make a big comeback if the gaming industry takes a serious turn towards pathtracing/ray-tracing. The rendering pathways are comically parallel so scalability isn't that much of a problem unlike rasterization. The economic realities of monothic chips are catching up. It will begin to make more sense to make specialized chiplets if the industry wants to continue the pathtracing/ray-tracing route.

AMD RTG didn't throw infinity fabric into the Navi architecture for a quick laugh. I wouldn't be surprise if they end-up making a dedicated ray-tracing chiplet and GPU-hybird solution as their full answer to Turing dynasty.
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