Personal computing discussed
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whm1974 wrote:At this point I'm not sure if PCIe v4 could be useful during the foreseeable future. Although I supposed enough time has passed to update the standard...
Waco wrote:whm1974 wrote:At this point I'm not sure if PCIe v4 could be useful during the foreseeable future. Although I supposed enough time has passed to update the standard...
For consumers? Probably not, but it'll drop the cost of boards if you only need 8 lanes or something for the same bandwidth that 32 gave you before.
For everyone else? Absolutely. MOAR BANDWIDTH.
TwistedKestrel wrote:It could definitely be useful. Not for single devices like GPUs, but getting more bandwidth out of the same number lanes on a system-wide basis could make current lane allocation shenanigans less of an issue.
chuckula wrote:Waco wrote:whm1974 wrote:At this point I'm not sure if PCIe v4 could be useful during the foreseeable future. Although I supposed enough time has passed to update the standard...
For consumers? Probably not, but it'll drop the cost of boards if you only need 8 lanes or something for the same bandwidth that 32 gave you before.
For everyone else? Absolutely. MOAR BANDWIDTH.
Imagine a board that delivers the same total bandwidth of 64 PCIe 3.0 lanes like the Threadripper but only needs wiring for 32 lanes due to PCIe 4.0.
You might not think it's too impressive, until you see the reduced price of the board.
chuckula wrote:Waco wrote:whm1974 wrote:At this point I'm not sure if PCIe v4 could be useful during the foreseeable future. Although I supposed enough time has passed to update the standard...
For consumers? Probably not, but it'll drop the cost of boards if you only need 8 lanes or something for the same bandwidth that 32 gave you before.
For everyone else? Absolutely. MOAR BANDWIDTH.
Imagine a board that delivers the same total bandwidth of 64 PCIe 3.0 lanes like the Threadripper but only needs wiring for 32 lanes due to PCIe 4.0.
You might not think it's too impressive, until you see the reduced price of the board.
whm1974 wrote:OK you convinced me, it can be useful. Now what about DDR5?
whm1974 wrote:TwistedKestrel wrote:It could definitely be useful. Not for single devices like GPUs, but getting more bandwidth out of the same number lanes on a system-wide basis could make current lane allocation shenanigans less of an issue.
Even so, we will still be better off increasing the number of lanes instead.
whm1974 wrote:OK you convinced me, it can be useful. Now what about DDR5?
chuckula wrote:whm1974 wrote:TwistedKestrel wrote:It could definitely be useful. Not for single devices like GPUs, but getting more bandwidth out of the same number lanes on a system-wide basis could make current lane allocation shenanigans less of an issue.
Even so, we will still be better off increasing the number of lanes instead.
Will we? Lanes cost money and power to implement. Waco is super excited about the Threadripper because he will actually use all 60 lanes* on the board that hook directly to the CPU. However, he's in the 1% of users of that platform that will actually be using all that bandwidth.
However, if you go to PCIe 4.0, then a 16x connector will be delivering twice the bandwidth to a single GPU, even if you never use any of the other lanes (and there's never going to be an x32 PCIe 3.0 connector that could do the same job). As of right now that bandwidth probably isn't going to make for huge gains, but these I/O standards need to be put in place prior to the launch of products that actually use them.
* There are 64 lanes but 4 go to the chipset.
whm1974 wrote:At this point I'm not sure if PCIe v4 could be useful during the foreseeable future. Although I supposed enough time has passed to update the standard...
Kurotetsu wrote:whm1974 wrote:At this point I'm not sure if PCIe v4 could be useful during the foreseeable future. Although I supposed enough time has passed to update the standard...
It'd be incredibly useful for Thunderbolt 3. TB3 currently mandates up to 4 x PCI-E 3.0 lanes per port. Keeping the 4 lanes but increasing their bandwidth would help A LOT for things like external GPUs. Imagine those 4 lanes giving the equivalent bandwidth of a full 16 lanes of PCI-E 2.0, for example.
whm1974 wrote:TwistedKestrel wrote:It could definitely be useful. Not for single devices like GPUs, but getting more bandwidth out of the same number lanes on a system-wide basis could make current lane allocation shenanigans less of an issue.
Even so, we will still be better off increasing the number of lanes instead.
just brew it! wrote:whm1974 wrote:TwistedKestrel wrote:It could definitely be useful. Not for single devices like GPUs, but getting more bandwidth out of the same number lanes on a system-wide basis could make current lane allocation shenanigans less of an issue.
Even so, we will still be better off increasing the number of lanes instead.
Pin count matters. Number of PCB traces matters. You can increase bandwidth without adding pins/traces if you increase the speed of each lane.
blahsaysblah wrote:a) AMD/NVidia will create 4 lane cards to save on costs
b) MB vendors will not create electrically 16 lane and tell GPU vendors to go away
c) Will now have around 31.5GB/sec transfer capability for all those 8GB VRAM GPUs
Zizy wrote:What does this mean for NVLink? Irrelevant POWER thingy, or does it still hold an advantage?