Flying Fox wrote:
This discrepancy is explained by the AMD smaller L2 cache and no L3 cache,... I think.
The answer may not be so simple I think. The C2Q has well-known performance of SSE instructions, which the SMP Gromacs love. Back then the Core 2 architecture owned the K8's in that depart and the Phenom/Athlon II is now catching up (do them beat the older Core 2's? Not sure based on the results).
This is what I was thinking too; C2's biggest strength was that it combined the advances in CPU design gleaned from attempting to make Netburst a marketable product with a supercharged SSE2 unit, which made a huge difference with applications needing to be SSE2 optimized in order to simply function on Netburst. /History
We'd have to assume that it's a combination of the two. I'm also willing to bet that if you explored overclocking, you'd get the clock on that Athlon II quite a bit higher than the Q's when overclocked, more than making up for the Q's relatively higher IPC advantage.