According to EE Times, second-gen Z-RAM is expected to allow chips to store 5Mb (625KB) of data per square millimeter on a 65nm process. Using this technology, a 65nm processor could theoretically pack 10MB of cache in an area of just 16mm². For reference, 65nm Intel Core 2 Duo chips have a die area of 143mm², and going by Intel's die shots, around a third of that area is required to store 4MB of cache. Z-RAM's speed and power consumption are quite enticing, too. The second-gen tech clocks up to 400MHz and can draw as little as 10μW (0.00001W) per MHz.
AMD's plans for the tech are quite clear. In the ISi press release, AMD's Technology Development VP Craig Sander is quoted as saying, "The combination of density, power, and performance coupled with its ability to work with our standard manufacturing processes makes [Z-RAM] an extremely attractive option for use in our future microprocessors."