AMD, IBM tout enhancements for 45nm process

At the International Electron Device Meeting in San Francisco, AMD and IBM have presented information about process enhancements they're developing for their upcoming 45nm chip fabrication technology. The advances include immersion lithography and the use of ultra-low-K dielectrics. The press release offers this description of immersion lithography:
Immersion lithography uses a transparent liquid to fill the space between the projection lens of the step-and-repeat lithography system and the wafer that contains hundreds of microprocessors. This significant advance in lithography provides increased depth of focus and improved image fidelity that can improve chip-level performance and manufacturing efficiency.
The two companies claim to have the first "production-class immersion lithography process" and expect to use it for 45nm processors. They also expect this technique to offer substantial benefits in terms of production costs and transistor performance—including an improvement in SRAM cell performance of up to 15%.

They anticipate additional improvements in performance and power consumption via the use of ultra-low-K dieletrics:

This advance is enabled through the development of an industry-leading ultra-low-K process integration that reduces the dielectric constant of the interconnect dielectric while maintaining the mechanical strength. The addition of ultra-low-K interconnect provides a 15 per cent reduction in wiring-related delay as compared to conventional low-K dielectrics.
AMD and IBM say their improved transistor straining techniques have allowed them to achieve the highest CMOS performance in 45nm chips to date. The two companies don't expect to ship 45nm chips until the middle of 2008. Intel, on the other hand, stated last month that it was on track to launch its first 45nm processors in the second half of 2007.
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