AMD's processor plans examined in detail

Anand Lal Shimpi over at Anandtech has had the opportunity to sit down with AMD CTOs, and he's put together a very detailed article about AMD's plans for the future. Much of what AMD discussed was already covered in its Financial Analyst Day presentation in December 2006, such as the chip maker's plans to build "accelerated processors"—chips with regular CPU cores and special-purpose "accelerator" cores—following the release of its Fusion CPU-GPU chimera in 2009. However, AMD gave Anand some extra background info, including details on the development process of its next-generation quad-core architecture, K10.

Apparently, AMD wasted around six months on the development of a stillborn "K9" project that was to be a highly-parallel architecture with support for FB-DIMM memory. Despite AMD's efforts, the architecture would have had poor single-threaded performance, "tremendous" power consumption, and AMD perceived the adoption of FB-DIMM memory to be a mistake when it realized that prices for the memory wouldn't drop.

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