The Idaho based memory company came up with the idea of embedding an eight megabyte L3 cache into the chipset! Christened "eCache," this L3 cache memory can maintain 9.6 GB/s of sustainable bandwidth. By fabricating eCache on the same die as the memory controller, Micron can reduce latencies by up to 50%!This Athlon chipsetor one from another manufacturer based on Micron's designcould help put Rambus into the ground, and could be a huge boost for AMD. Mr. Smith is bullish on the performance prospects, as well. He reports: "Micron claims up to a 15% increase in real system performance, which might even be conservative."
Van also talks AMD, multiprocessing, and Mustangs. Among other things, he notes that AMD's Mustang core has been tweaked; the branch prediction unit should be more accurate. No word on whether such changes will migrate back across the Athlon and Duron lines, but I suspect they might.