Intel Silverthorne mobile chip to be slower than expected?

At Computex this summer, Intel revealed more details about its strategy for "mobile Internet devices" (MIDs) and Menlow, the successor to its McCaslin MID platform. Unlike McCaslin, Menlow will include a new processor designed to compete head-on with the non-x86 chips that currently dominate the handheld industry. That processor is dubbed Silverthorne, and we already know it’s an x86 part based on 45nm process technology, but Intel hasn’t talked much about the architecture behind it.

Luckily, the folks at Ars Technica—with the help of David Kanter from Real World Technologies—were able to unearth some additional information about Silverthorne’s design in the program for the 2008 International Solid State Circuits Conference. The information says Silverthorne will have a two-issue, in-order pipeline with integer and floating point execution units, 32KB of iL1 cache, 24KB of dL1 cache, 512KB of L2 cache, and a 533MT/s front-side bus.

According to Ars, that suggests the chip harbors a design similar to that of the original Pentium processor, which was also a two-issue, in-order chip. Based on this find, the site extrapolates that Silverthorne will be at a performance and power efficiency disadvantage compared to RISC embedded processors from the likes of ARM: "I think we can safely assume at this point that Silverthorne will be clock-for-clock slower and less efficient than a comparable ARM part, especially on integer-intensive Web and productivity apps." Instead, Intel will have to rely on its process technology advantage to stay competitive, with 45nm Silverthornes set to fight it out against 65nm ARM chips.

Comments closed
    • tfp
    • 12 years ago

    One thing that might be helpful is the code size for x86 is normally smaller then ARM or RISC.

    I know flash is getting cheaper but so is the amount of money customers are willing to play for a embedded device.

    • d2brothe
    • 12 years ago

    Hahaha…based on the original Pentium design, Intel just loves going back in time apparently, first reviving the P6 to get core, now, the original P5 to get this, I guess they’re hoping for a second win in their history.

      • Master Kenobi
      • 12 years ago

      So far it’s working.

      • bhtooefr
      • 12 years ago

      Right, but there’s a bit of a difference this time around.

      When Intel released NetBurst, IMMEDIATELY people wanted P6 back.

      When Intel released P6 to consumers (as the Pentium II,) the Pentium was quickly relegated to the cheap processor role, until the Mendocino P6 Celerons came out, and made the Pentium I utterly outdated.

    • TSchniede
    • 12 years ago

    The bigger caches hint to an optimized CPI – perhaps they even incorporated some technology of the new core CPU’s to improve the CPI by avoiding stalls.

    • Perezoso
    • 12 years ago

    Codename=P55D
    CPUID=0544h

    ๐Ÿ˜€

    • BoBzeBuilder
    • 12 years ago

    I’ll take a power efficient CPU over a powerful one anyday, when it comes to mobile computing.

    • Krogoth
    • 12 years ago

    Captain Obivious to the rescue.

    Mobile, power efficent CPUs are typically not known for extreme performance.

    On a serious note, the chips are geared towars a market where performance takes a backseat behind power efficiency.

      • willyolio
      • 12 years ago

      Commander Literacy on the counterattack!

      RTFA, Commander Literacy commands you! this mobile, power efficient CPU is slower and less efficient than other mobile, power efficient CPUs.

        • poulpy
        • 12 years ago

        Commodore Common Sense would rather wait for any actual hardware release and benchs before claiming it _[<*[

          • eitje
          • 12 years ago

          General Apathy will wait for the killer mobile app to show up that needs the x86 ISA to run.

            • Krogoth
            • 12 years ago

            This thread wins.

            • Wirko
            • 12 years ago

            … and we shall submit the word “obivious” to General Dictionary.

            • UberGerbil
            • 12 years ago

            …and Major Amusement was had by all. Nicely done.

    • willyolio
    • 12 years ago

    wait… and this is a chip that was designed from the ground up to be ultra-low-power and as efficient as possible?

    i wonder how it compares to AMD’s existing Geode processors…

      • bhtooefr
      • 12 years ago

      The Geodes (other than the NX) are derived from the Cyrix MediaGX, which is in turn derived from the Cyrix 5×86. Barely Pentium-class.

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