While browsing news sites today, we came upon several reports saying Core i7 processors suffer from a translation lookaside buffer-related erratum. Those reports drew parallels between the TLB bug that plagued AMD’s first quad-core CPUs and a note in Intel’s Core i7 specification update, which states in part:
In rare instances, improper TLB invalidation may result in unpredictable system behavior, such as system hangs or incorrect data. Developers of operating systems should take this documentation into account when designing TLB invalidation algorithms. For the processors affected, Intel has provided a recommended update to system and BIOS vendors to incorporate into their BIOS to resolve this issue.
We asked Intel PR manager Dan Snyder for the chipmaker’s official take on the issue, and he replied with the following:
This is simply a pointer to a previous document written in April 2007. This document is an application note (advises on programming techniques) that programmers have had since April of 2007. This item in the Nehalem spec sheet is a web pointer, under the heading "spec clarification". The reporter who wrote this did not contact us and we will try to clarify this with him.
In other words, Intel shareholders probably shouldn’t be losing any sleep over this.
For reference, the AMD TLB erratum caused data corruption and system hangs in periods of high CPU utilization, and AMD halted shipments of quad-core Opterons for months because of it. On the desktop, the company released a BIOS fix that crippled the performance of early quad-core Phenoms in many apps. All Phenoms with model numbers ending in "50" and all shipping quad-core Opterons lack the erratum, though.
Update: Snyder has sent us a new statement that makes the situation even clearer:
The "AAJ1 Clarification of TRANSLATION LOOKASIDE BUFFERS" document is a SPEC CLARIFICATION, and is simply a pointer to a previous document written in April 2007.
SPEC CLARIFICATION AAJ1 was initially added due to an issue on the Intel® Core 2 Duo processor which was previously corrected with a BIOS update; this issue does not impact the Nehalem Family of CPUs. There are errata on the Intel® Core i7 processor that relate to the TLB. These all relate to improper translations or error reporting, and all of those that impact functionality have been fixed via BIOS updates prior to Core i7 launch.
(The emphasis is Intel’s.)