AMD sheds light on Bulldozer, Bobcat, desktop plans

During its 2009 Financial Analyst Day presentation today, AMD revealed some more details about its next-generation processor architectures, Bulldozer and Bobcat, as well as its desktop processor roadmap for 2010 and 2011.

This latest desktop roadmap is a little bit different from the one we saw a year ago. For starters, AMD now explicitly mentions plans for a six-core core Thuban processor in 2010. Also, the company now dubs its 32-nm enthusiast processor Zambezi. That part will have four to eight cores and will fit in AM3 sockets, just like existing Phenom IIs and Athlon IIs.

On the mainstream 32-nm front, AMD has stuck with Llano. The latest roadmap says that processor will have "up to" four cores, though, suggesting we could see a dual-core version. Once again, the APU label means all Llano offerings will have a built-in graphics core.

AMD will base the 32-nm Zambezi processor on its next-generation Bulldozer architecture, which will supplant the existing K10 design and go up against Intel's Nehalem and Sandy Bridge. Today's presentation included a few juicy nuggets of information about what Bulldozer processors will look like:

What you see above, folks, is a Bulldozer processor module. AMD will stick one or more of those on each chip, sometimes alongside a graphics core. Each Bulldozer module has two cores, but in a novel twist, those cores will share fetch logic, decode logic, floating-point logic, and L2 and L3 cache between them. Each Bulldozer core will nevertheless have its own integer execution units.

AMD says it strove not to compromise single-threaded performance with Bulldozer, an aspiration that led to the discrete integer processing elements. Purportedly, Bulldozer processors will deliver "outstanding" performance with traditional workloads.

Incidentally, AMD put those recent 128-bit rumors to rest by saying Bulldozer's floating-point multiply and accumulate (FMAC) units will be able to process two 64-bit double-precision or four 32-bit single-precision operations simultaneously, but not single, 128-bit operations.

AMD has one more architecture up its sleeve: Bobcat, which will act as AMD's answer to the Atom processor in many ways.

AMD claims Bobcat will deliver 90% of the performance of today's mainstream processors with half the die area. With reduced voltage and clock speeds still at "very reasonable" levels, Bobcat should ease into sub-1W power envelopes, as well. The company has even made Bobcat synthesizable, meaning the silicon design is written in a high-level language and should be relatively straightforward to modify—or port to different process technologies. That little tidbit lends some credence to what we've been hearing about 40-nm bulk silicon APUs.

Of course, all of this power-efficiency and versatility will come at a price. AMD says the synthesizable architecture reduces top clock speeds by 20%, and the processor will also lack L3 cache and support for SSE4 instructions. Hardware virtualization will still make the cut, though.

Unlike Intel with the Atom, AMD isn't planning to squeeze Bobcat into smart phones. At least not yet. However, we will see Bobcat sharing the ride with a graphics core in the upcoming Ontario APU, which will hit ultraportables in 2011.

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