The Piledriver CPU cores in AMD’s upcoming Trinity APU will feature some special sauce courtesy of Cyclos Semiconductor, a company spun out of the University of Michigan in 2006. Cyclos’ specialty? Resonant clock mesh technology that purportedly offers higher performance and lower power consumption.
According to this Cyclos whitepaper (PDF), performance can be improved by 5-10% using a clock mesh instead of the clock trees typically employed by microprocessors. This mesh distributes the clock cycle over a uniform grid that covers the entire chip. The mesh reduces the clock skew associated with tree-based designs, allowing the chip to utilize more of its clock cycle.
The problem with meshes is that they tend to consume more power than clock trees. Cyclos’ solution is a resonant clock mesh that uses on-chip capacitors and inductors to create a tank circuit that acts as a sort of electronic pendulum. The charge flowing between the capacitors and inductors is largely self-sustaining, generating an effective clock cycle that needs only a “nudge” from an external source to keep the virtual pendulum swinging in time. Cyclos claims this approach can lower total chip power consumption by up to 30% without compromising the performance benefits of the mesh.
In a Piledriver core running at over 4GHz, Cyclos’ resonant clock mesh is said to reduce “clock distribution power” by 24%. That’s a far cry from cutting total chip power by 30%, but it’s a reduction nonetheless—and an important one considering AMD intends to offer a 17W version of Trinity. What’s more, AMD says Cyclos’ technology was easy to integrate without increasing the die size of the chip or tweaking the manufacturing process.