We already know that AMD’s next-gen Kaveri APU is coming to mobile systems. However, the chip will only fit into power envelopes ranging from 15W to 35W. For the tighter TDPs suited to tablets and convertibles, AMD has a couple of other, lower-power chips planned—and it announced them today at its APU13 event in San Jose.
These low-power APUs are called Beema and Mullins, and they’re successors to today’s Kabini and Temash offerings. AMD says they deliver twice the performance per watt of their predecessors and are scheduled for release in the first half of 2014.
Beema will fit within roughly the same 10-25W power envelopes as Kabini. It will feature 2-4 processor cores based on Puma, the successor to the Jaguar architecture, as well as integrated graphics based on the same GCN guts as current parts. For what it’s worth, AMD describes Puma as an "evolution" of the Jaguar architecture that’s "not a significant departure" from previous-gen low-power cores.
Mullins is more exciting. It, too, will have 2-4 Puma cores and GCN graphics, but AMD will squeeze Mullins into a lower power envelope than Temash. The company quotes a "~2W SDP" figure, nearly half the 3-4W rating of the lowest-power Temash chips. The lower power utilization will allow quad-core versions of Mullins to power fanless tablets and convertibles.
I asked Gabe Gravning, AMD’s Director of Client Marketing, how Mullins would compare with Intel’s Bay Trail-T in tablets and convertibles. Though he steered clear of exact numbers, Gravning said AMD plans to be "very competitive," and he added that the company is "extremely bullish" about where it is in terms of performance and power efficiency compared to Bay Trail.
So, yeah. If all goes well, we might see more AMD-powered Windows slates next year. A Mullins-powered version of the Transformer T100 would be nice.
Higher performance per watt and lower thermal envelopes won’t be the only improvements in Beema and Mullins. The chips will also support InstantGo, Microsoft’s connected standby standard, and they’ll integrate an on-die "AMD Security Processor." That security component will actually be a Cortex-A5 co-processor with ARM’s TrustZone technology.
As I understand it, TrustZone works by splitting the processor into two virtual CPUs. One virtual CPU runs secure processes in what ARM calls the "secure world," while the other runs other processes in the "normal world." That way, secure processes shouldn’t be able to affect non-secure ones. According to AMD, the co-processor will enable a "programmable trusted execution environment" for a variety of applications, from secure booting and content management to online payments and malware protection. A "huge number of infrastructure and application capabilities" rely on TrustZone for security, AMD says.
See the image gallery below for higher-res shots of the slides above.