Earlier this year, we took a look at ARM's move into the data center, enabled by hardware like the CCN series of "uncore" complexes. The CCN uncores provide the glue to hold together multi-core SoCs for servers, network processors, and more. The CCN-500 series, in particular, offers all of the high-bandwidth I/O, last-level cache, and coherent communication needed for a fairly large-scale server processor with up to 32 cores.
At least, 32 was the peak at that time. We reported back then that ARM was working on larger and smaller versions of this CCN, and today, the firm has pulled the curtains back on a pair of new products that fit that description.
The larger of these new products, the CCN-512, can support as many as 12 quad-core clusters of Cortex CPU cores—or up to 48 cores on a single chip. The smaller version, the CCN-502, tops out at four clusters or 16 cores. These offerings bookend the existing members of the same family, the CCN-504 and CCN-508.
Both of these new uncore products are built from the same basic components as the other CCN-500-series designs. Their foundation is a series of modular "crosspoints" of several types, including CPU cluster attach points, IO interconnects, and memory controllers. Each crosspoint has its own associated last-level cache partition. These crosspoint components can be laid down on a chip in various mixes, and together, they combine to form a ring with fully coherent I/O and memory access.
According to ARM's Nandan Nayampally, although the CCN products are modular and scalable, ARM and its partners face a challenge in validating the correct operation of larger- and smaller-scale implementations of this technology. That fact isn't surprising, given the complexity involved. Thus, ARM decided to create two new CCN products tailored for different-sized deployments. The goal, as ever, is to ease the path for ARM's partners to deploy its technology.
The CCN-512 may be the more interesting of the two products, simply because of its larger scale. The CCN-512 looks very much like the smaller CCN-508, with the same last-level cache size and quad memory channels. The biggest change here is the addition of four more CPU cluster connections. Those clusters would usually be comprised of four Cortex-A-series CPU cores like the A57 or A53. As the diagram above indicates, though, the cluster attach points could also be dedicated to custom co-processors like DSPs or GPUs capable of communicating over ARM's AMBA 5 CHI interface. (AMBA 5 CHI is a coherent interconnect similar to Intel's QPI.)
ARM says this new uncore has lots of bandwidth on tap; it can move data at up to 1.8Tbps internally, and it can connect to as many as 24 I/O devices via the AXI4 and ACE-Lite interfaces.
The CCN-502 is at the other end of the spectrum, topping out at four CPU clusters, 8MB of last-level cache, and 0.8 Tbps of bandwidth. The big news here is efficiency. ARM says the CCN-502 can save up to 70% of silicon area compared its big brother, the CCN-504.
The diagram above gives some context for these newcomers in ARM's range of offerings. The CCI-400 uncore at the bottom of the stack is based on the older AMBA 4 ACE standard; it's what you could expect to see in SoCs built for battery-operated devices like smartphones and tablets. The beefier CCN series is meant for higher-power, higher-performance applications.
ARM's customers will likely adopt these two new CCN offerings for use in a range of products. ARM says we can expect to see the CCN-502 in cellular base stations and enterprise-class routers. The CCN-512 will likely find a home in cloud servers, larger-scale networking chips including those driving software-defined networking equipment, and SAN controllers.