RRAM breakthrough could lead to 1Tb chips built on 28-nm tech

Remember Crossbar, the firm developing resistive random access memory (RRAM) with higher performance and endurance than NAND? The company announced a breakthrough at the International Electron Devices Meeting earlier this week. We caught up with VP of marketing and business development Sylvain Dubois for an explanation—and to find out how close Crossbar is to actually delivering RRAM products.

Crossbar is pursuing two RRAM applications. The embedded variant is designed to provide on-chip storage for microcontrollers, SoCs, and the like. There's also a higher-density version meant for discrete storage, like SSDs.

According to Dubois, the embedded stuff is "very close" to commercialization. Crossbar isn't talking specifics just yet, but it has multiple "alpha customers" integrating RRAM tech into their chips. The first samples are expected in a few months, and mass production could begin by the end of next year or early 2016. The timeline for embedded products is somewhat contingent on what's going on in the rest of the chip, which is outside Crossbar's domain.

Source: Crossbar

The company's recent breakthrough applies to high-density RRAM optimized for discrete storage. The cross-point array is vulnerable to sneak path current, where leakage from other cells interferes with addressing the desired target. This leakage stems from having multiple cells gated by a single transistor. It also increases power consumption.

Leakage is avoided in Crossbar's embedded RRAM by tying each cell to its own transistor. That approach doesn't scale to higher storage densities, but Crossbar has developed a cell selector that does. This component acts "almost like a switch," Dubois told us, effectively eliminating the leakage associated with unselected cells.

The graph on the left shows a standard RRAM cell. The two current lines for each voltage represent the cell's response when it's empty and when it's filled with data. On the right, the addition of the selector creates an "off" state while still leaving enough margin to represent data. Crossbar claims this approach is extremely fast, with turn-on times under 50 nanoseconds. The firm also says the endurance clocks in at over one million cycles.

Crossbar already has the selector working in hardware. The demo chip is fabbed on older 110-nm tech, but the technology can apparently be adapted to any traditional fab. Commercialization is running about a year behind the embedded products, Dubois told us, and first implementation could be built using 28-nm tech. Dubois expects the initial offering to have 16 layers and a 1Tb (128GB) capacity with one bit per cell.

MLC and TLC configurations are also possible, and Crossbar doesn't anticipate problems scaling down to smaller lithography. The conductive filaments at the heart of its RRAM tech are only four nanometers wide, regardless of the cell geometry, which would seem to leave room for a few process shrinks.

Crossbar hopes to partner with multiple semiconductor foundries to bring its RRAM tech to market. Dubois wouldn't tell us which ones the firm is talking to right now, but he did reveal that Crossbar has no plans to share its technology with memory makers.

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