Begun, the 3D flash war has. Toshiba announced today that it has started sampling non-volatile memory chips with 48 layers. Dubbed BiCS, or Bit-Cost Scalable, the 3D flash packs two bits per cell and 16GB (128Gb) per die.
The press release doesn't detail the fabrication process used to create the BiCS flash, but it's worth noting that Toshiba is stacking more layers than its peers. Samsung and IMFT, Intel's joint flash venture with Micron, both use 32-layer designs. Samsung's current implementation offers 10.8GB (86Gb) per die in an MLC config, while IMFT is prepping 32GB (256Gb) chips due to appear in SSDs later this year.
BiCS flash is targeted primarily at solid-state drives, and Toshiba says the underlying 3D structure "enhances the reliability of write / erase endurance and boosts write speed." There's no word on performance or endurance specifications, possibly because mass production is still a ways off. Toshiba doesn't expect to start cranking out the chips in volume until the first half of 2016. The firm is building a new fab with SanDisk specifically for 3D flash production, and that facility won't be ready until next year.