Rumor: Zen-based Opterons have up to 32 cores and 128 PCIe lanes

There's been a lot of talk about AMD's next series of Opterons based on the new Zen architecture. Earlier this year, a CERN engineer revealed that Zen server processors would have up to 32 cores and eight channels of DDR4 memory. Now, Fudzilla is reporting that the massive microprocessor, which the site calls "Naples," will have 64MB of last-level cache, 128 PCI Express 3.0 lanes, and an LGA socket called SP3.

The rumor claims that Zen processors will range from that huge 32-core package all the way down to dual-cores. Thermal design power on the new chips purportedly ranges from 35W up to 180W. Fudzilla says Naples has an integrated 10-gigabit Ethernet controller, too. The site doesn't name its source, so we'd take all of the above with a mountain of salt.

Still, the rumors line up with earlier leaks and rumors that claimed that the massive 32-core package would in fact be a multi-chip module with multiple 8- or 16-core chips on an interposer. Doing the math, that arrangement would imply an eight-core processor with 16MB of last-level cache, 32 PCIe 3.0 lanes, and a dual-channel DDR4 memory controller—all reasonable values for the enthusiast-focused processor AMD CEO Lisa Su teased at E3. Fudzilla says the server-bound Zen parts are coming in 2017, "with a possibility of very late 2016 introduction."

Comments closed
    • Ummagumma
    • 3 years ago

    Rumor, eh?

    I’ll wait for the movie to come out before I judge.

    • BaronMatrix
    • 3 years ago

    AMD said there would be no dual cores… I guess though they would work as SuperClocked 4P but why bother when Zen is a quad chip…?

    • south side sammy
    • 3 years ago

    WOW, I must be a soothsayer………….. Look, nvidia is actually dropping the prices on their cards…….. and not just by a few bucks. ….. amazing. I feel less ripped off already…….. NOT!

    • krazyredboy
    • 3 years ago

    I think a Mole hill of salt would be more apropos… considering we are Gerbils, after all…

    • cmrcmk
    • 3 years ago

    So this theoretical chip would have maybe 4000 motherboard contacts on the package? I know it’s important to have “4K” in the marketing somewhere, but I don’t think “LGA-4K” is going to move many chips (though it will make traces on the board the electrical engineers’ version of an 11x11x11 Rubik’s cube).

      • RAGEPRO
      • 3 years ago

      Not as strange as you might think. Intel’s next high-end Xeon family will be using LGA 3647. 🙂

    • rudimentary_lathe
    • 3 years ago

    Hopefully AMD employs the same pricing strategy with its new CPUs as it apparently will with its new GPUs: make them cheap in order to try and capture market share.

    Intel’s margins are silly. There should be ample room for AMD to lower prices and and still earn very attractive returns, provided of course Zen is in the same ballpark as Haswell performance or better.

    A $200 Zen 4C/8T CPU to go along with a $229 Polaris RX 480 8GB GPU? Yes please!

      • Kretschmer
      • 3 years ago

      Low prices are a desperation move, not a sustainable strategy. AMD likely won’t survive with another generation of “bargain basement” offerings.

        • mesyn191
        • 3 years ago

        If it performs like they’ve been saying they can underprice Intel by 20% or so and still be rolling in cash compared to how they’re doing right now.

      • tipoo
      • 3 years ago

      They need to have not-AMD margins anymore while also having not-Intel margins.

        • mesyn191
        • 3 years ago

        Yes. This. A return to the K6 era strategy of underpricing Intel by a significant margin while still performing “close enough” will get them tons of sales and money.

    • ronch
    • 3 years ago

    INTEL IS SO DEEEEEEEAAAAAADDDDDDDDD!!!!!!

    (Ima just gonna put this here…)

      • RAGEPRO
      • 3 years ago

      [url<]http://i.imgur.com/Fj8BRpo.png[/url<] If I may borrow a message from auxy.

        • auxy
        • 3 years ago

        I didn’t authorize this! You’ll hear from my lawyer! (・へ・)

          • ronch
          • 3 years ago

          Aaaaww…. you two are so sweet. 🙂

      • spiritwalker2222
      • 3 years ago

      Can’t tell if your joking or not.

    • jihadjoe
    • 3 years ago

    8-way CrossFire confirmed?

    • Unknown-Error
    • 3 years ago

    So Sandy Bridge like IPC with 2C/4T, 4C/8T, 8C/16T, 16C/32T, 32C/64T variants combined with some decent clocks? Hmm, maybe for once I can be less pessimistic about AMD CPUs than their GPUs.

      • brucethemoose
      • 3 years ago

      It’s probably 8C/16T and cut down version of that for anything you and I will see.

      Higher core counts will probably be multiple dies on some kind of MCM/interposer that fits in expensive, multiplier locked server motherboards. For the cost, that’s not particularly useful in most desktops.

        • mesyn191
        • 3 years ago

        Yea 16+ core count chips will be very expensive.

        AMD never was shy about charging a higher price so long as the product was decent.

        For desktops I think they’ll be able to offer real value though. Zen will be going up against Skylake and Kaby Lake when it launches which means it’ll probably be 10-15% slower per clock so they’re going to have to compete on price.

        I wouldn’t mind a 8C/16T Zen with Haswell-ish performance that OC’s to ~5Ghz for a non-stupid price but who knows if they can pull that off? Especially the clock speed. Though to be fair AMD was getting pretty good clock speeds out of TSMC’s 28nm tech. Power and heat were the problems there.

          • ronch
          • 3 years ago

          I’d be happy to grab a 4C/8T Zen SKU that trades blows with the 6700K and sells for something like $280. And I’m sure I won’t be the only one.

            • mesyn191
            • 3 years ago

            If they pull of Haswell-ish performance then it’ll lose to the 6700K by 5-10%, not exactly trading blows, but not noticeably slower either for most desktop use.

            I’m hoping they sell a chip like that for closer to $200 than $280. That is just my hoping though. I don’t think there have been even crappy rumors about Zen pricing. Mother boards were supposed to have shown up by now but still nothing there too.

            Looks like its going to be a verrry late 2016 launch or Jan/Feb 2017 launch to me so far.

            • ronch
            • 3 years ago

            If it delivers Haswell-level per-thread and per-core (SMT-enabled) IPC but compensates by being an 8C/16T part and goes for about the same price as the 6700K (or maybe even a little higher, say, something like $380), I can see it making a clean sweep. Buyers looking at getting the 6700K will have a few sleepless nights rolling in bed on that one.

            As for pricing, AMD’s marketing folks are probably getting drunk down at the local pub and debating about how Zen chips should be priced as we speak.

            • smilingcrow
            • 3 years ago

            I’ve been saying this for a while and glad to see that 8/16 C/T chips are available for the mainstream socket.
            There’s no way the IPC will be bad enough for the chips not to offer great performance for loads that scale to 16 threads.
            Broadwell E is going to look very expensive if AMD aim to price these to compete with Skylake i7.

            • ronch
            • 3 years ago

            The good thing about Zen from what I can see at this point is AMD’s announcement that they want to use a common socket for desktop chips to simplify things. This means, assuming the 8C parts don’t require too much power you can grab a midrange board that’s much cheaper than Intel’s Socket 2011 options and buy 4C now and upgrade to 8C later. Lower mobo costs, better upgrade path. Assuming Zen will deliver the per-thread IPC and reach high clocks, I see no reason why I should go with Intel. And I think I’ll also be OK with Asmedia chipsets. And it looks like AMD hasn’t shed their tendency to price competitively. They can price high as they have sometimes done if they could, but I reckon they’re desperate to take back market share and mind share.

      • mesyn191
      • 3 years ago

      Supposedly closer to Haswell (40% better IPC than Excavator is the quoted performance) but we’ll have to wait and see.

    • ptsant
    • 3 years ago

    If it’s at or under $1000 for 16 cores, I’m buying it.

      • ronch
      • 3 years ago

      Only if Zen fails to meet high expectations.

    • ronch
    • 3 years ago

    Well, let’s just hope there are still people left that want to buy servers. I reckon everyone who can and wants to buy servers already did. Kinda like how anyone who wants to buy an SSD probably already did in the past few years.

    Edit – That was meant to be sarcastic. I think AMD should’ve decided to create something like Zen years ago and not at a late time like this when people have fewer and fewer reasons to buy new chips.

      • Flying Fox
      • 3 years ago

      Your idea of how people buy servers may apply only to small to medium size business, where they are on such low budget that they literally run their servers to the ground before even consider replacing.

      Larger businesses, especially data centers, replace hardware regularly. Partly for the expenditure write-downs, but the more important reason is to squeeze more cores and performance in the same footprint. They do both vertical (more cores/GHz) and horizontal (getting into more buildings, more locations) scaling.

    • ronch
    • 3 years ago

    32 cores is cool, but I just hope AMD isn’t packing more cores to make up for weaker per-core or per-thread performance. I mean, that’s been their strategy for a while now, hasn’t it? And it has always failed to really comvince customers that AMD can out-engineer Intel. (Ok, before someone screams they don’t have to match or beat Intel to survive, just look their financial performance since 2007).

      • Anonymous Coward
      • 3 years ago

      Well AMD [i<]can't[/i<] be expected to out-engineer Intel, so where does that leave things?

        • ronch
        • 3 years ago

        And yet they have done it in the past with the K7 and K8. It’s just a matter of miscalculation or complacency on Intel’s part though.

          • Klimax
          • 3 years ago

          Most of times, AMD acquired those designs and engineering talent. K7 is realized Alpha. K8 is updated K7. For some reason every acquisition produced good chip and then failed.

          It is extremely unlikely Zen will be anywhere close to same thing as K6 (NexGen acq) or K7(DEC Alpha) were.

            • ronch
            • 3 years ago

            Yup. AMD is great at ruining their acquisitions. Then the folks who were part of the acquired company leave. Nexgen, DEC (not an acquisition), Seamicro. Some would say they also ruined ATI but I think ATI is doing fine, if not stellar.

            • lem18
            • 3 years ago

            [quote<]ATI is doing fine, if not stellar.[/quote<] I see what you did there 😛

            • mesyn191
            • 3 years ago

            Huh? K7 had nothing to do with Alpha any CPU. They did use a heavily modified version of the bus that DEC had designed to communicate with the chipset for the K7 but that is it. And AMD played a role in designing it too.

            Yes K8 is a updated K7 but that has nothing to do with any acquisitions.

            AMD has had success with acquiring companies to help do their chips (NexGen and the K6) but their in house designs have been good too. AMD’s real problem has always been execution. They’ve always been late and have been plagued with production issues even when the design was OK.

            • ronch
            • 3 years ago

            He must be referring to the DEC guys who knocked on AMD’s doors and offered to put K7 together for Jerry. I remember reading an article on that old fuddy duddy print publication called PC Magazine back in the 90’s which said a bunch of DEC engineers wanted to do an x86 CPU and they thought if they wanna do it, they had to do it at AMD because Intel is a company of pure greed and evil. The rest is history, and so was Dirk getting sacked in 2008. “Thanks for all your help, [s<]Dor[/s<] Dirk! Get lost!", screamed the chairman. K6 was designed by NexGen which AMD bought out for something like $800M back in 1996. I read about it on PC Mag too. Unfortunately, as time went on I reckon the Nexgen guys (e.g. Fred Webber and S. Atiq Raza) gradually left. Maybe they couldn't stand Dirk's corny CPU jokes? Some of AMD's in-house designs (those that weren't borne out of acquiring a company or external DEC engineers knocking on the door and coming in like a bunch of Electrolux sales agents) were complete flops. K5 was the Golden Standard of Failure, but Randy Allen of K10 fame tried to steal the crown but somewhat failed, with Phenom II being quite competitive until Sandy Bridge came along. And of course, Bulldozer. Totally in-house. Mike Johnson, the guy who was one of the head honchos of the K5 project, nearly lost his crown to Mike Butler there, but luckily Bulldozer at least sold for many years, failing to grab the crown from the K5 engineer.

            • mesyn191
            • 3 years ago

            Yes a bunch of guys left DEC to go to AMD when Compaq shut them down around 1998-99 I think but that is very different situation which Klimax seems to be portraying. The only thing they bought from DEC was the EV6 bus which they modified for their use.

            The K6 was a modified NexGen design from what I recall. It was mostly NexGen’s work, which they did indeed pay for, but a fair amount of the work was reputedly done by AMD even after they paid for NexGen.

            The K5 was a financial flop due to launch issues and bad press but the chip itself performed well enough even if it didn’t hit as high of a clock as the Pentium so I wouldn’t call it a financial flop at all. It was nowhere near as bad as Bulldozer.

            The only real flop AMD has had was Bulldozer which just about sank the whole company. They screwed the pooch there so thoroughly I have no idea what they were thinking.

            • srg86
            • 3 years ago

            The K6 was based on the NexGen Nx686, the dual issue follow on design to the older single issue (with no FPU) Nx586.

            The Nx586 ran on its own mainboard and had a Pentium Pro like back side bus for its L2 cache (in 1994!). Heck it had a 461 pin package, which is 1 pin less than Socket A! One big down side to the Nx586 was that due to its development hell, it had no FPU and only an 80386 instruction set.

            The Nx686 was NexGen’s follow on, I’m guessing with a Pentium instruction set but still on its own mainboard. After the AMD acquisition, the bus unit was modified to be Pentium compatible. That became the K6.

            I think it’s a shame the K5 though was never more successful, also in development hell and early versions having yield and clocking problems. From what I can tell the K5 was an Am29050 with an x86 wrapper. At least based on all the diagrams I’ve seen it was also a 4 issue machine (though only with 2 interger ALUs) so integer performance was good. My K5 PR166 has integer performance like a Pentium 166, but only runs at 117MHz.

            • ronch
            • 3 years ago

            I dunno about the DEC guys leaving and heading for AMD in 1998-99. Never heard of it.

            K6 was actually going to be the Nexgen Nx686. When AMD bought Nexgen, they gave them their own building and left them alone. Basically, AMD told the Nexgen guys to include an FPU and make the thing compatible with Super 7.

            K5 was AMD’s first completely in-house design. In 1992 Jerry realized that they can’t keep cloning Intel’s stuff forever so he set out to have AMD build a completely in-house design. At that time AMD still had their 29K series of RISC processors, which was actually very popular in use with things like printers and such. Jerry wanted to concentrate on x86 so he axed their 29K efforts and repurposed those 29K engineers to K5 development. K5 was actually a 29K with an x86-to-29K front end and a 29K-to-x86 back end. Very interesting design and actually one of the most fascinating CPU cores ever (I am guessing AMD will do something similar with Zen and K12, what with both being sister cores). Problem is, years and years of simply cloning and lightly modifying Intel’s designs means AMD didn’t really have the huge expertise to build its own CPUs yet, and the K5 project was delayed, probably also partly due to difficulties adapting the 29K ISA to play nice with x86’s idiosyncrasies. Back then AMD’s new Fab 25 (0.25μm) was sitting pretty doing nothing because the K5 wasn’t ready. When it was finally finished, the core failed to meet IPC targets and merely matched the Pentium’s integer IPC (the K5 was a far more ambitious and advanced core than the Pentium) so the early revisions (SSA/5) had to clock as high as their Pentium equivalents (e.g. an SSA/5-PR90 ran at 90MHz) and not clock lower but compensate with higher IPC as intended. When AMD finally got K5 right and IPC was up, everyone else was cruising at around 166 to 200MHz but AMD can only manage to hit 116MHz (PR166) and yields of 133MHz parts (PR200) were low, making the K5/PR200 a rare item. This was 1996, and the 5th generation wars was starting to end. K5 wouldn’t survive the 6th generation. With their own in-house K6 project in shambles, they were in deep trouble. They looked around, saw Nexgen and bought them out. The Nx686 became the K6 and was released in 1997, quickly supplanting the K5 as AMD’s focus. This made the K5 very short-lived, having been commercially available for a very short while (1995 to around 1997 for final orders, I think). This makes the K5 the worst in terms of commercial success.

            I wouldn’t call Bulldozer AMD’s biggest flop. Yes it was far from being a blockbuster but it did allow AMD to limp along since 2011. That’s far better than K5. If AMD didn’t acquire K6 who knows what would have happened.

            • mesyn191
            • 3 years ago

            There were articles on it back then saying it was a big win for AMD at the time to get the DEC guys but I remember the press playing off as a joke. Some sort of desperate move by AMD and disgruntled ex-DEC guys that would go nowhere. Wiki does make mention of DEC people leaving for AMD in 98′ but doesn’t give many of the details.

            I think its a bit unreasonable of you to down play AMD’s work with the K6. They didn’t get a finished design there and they had to work on what they bought from NexGen for a year for a reason.

            I had a K5 PR90 FWIW and I was quite happy with it. Especially for the money I paid. It was behind the times even when new but a “real” Pentium 90Mhz chip would’ve cost hundreds more which I flat out couldn’t afford. While I do appreciate the depth of your reply on filling in the details I’d still disagree with you about the K5 being a worse disaster than Bulldozer though it was shorter lived than I remembered. Only 2 years!!

            K5 though didn’t cause the company to shrink drastically and nearly go under like Bulldozer did.

            • ronch
            • 3 years ago

            K5 was a worse disaster in terms of commercial success. You’re talking about how your K5 worked well enough for your needs, and I don’t doubt that. My FX works very well for my needs also but I won’t deny that it’s given AMD so many headaches.

            K6 was acquired by AMD in 1996 and released in 1997, so at the time of acquisition it’s likely practically ~90% complete. Nexgen just had to give it a Pentium-compatible bus interface and an on-die FPU. As I’ve said, AMD practically left the Nexgen guys on their own to finish the job as long as they met AMD’s requirements.

            • mesyn191
            • 3 years ago

            No no I brought up that I’d owned a K5 to show that I had personal experience with the chip, the market, and some of the stuff you were talking about. It’d be ridiculous of me to suggest that because K5 was fine for me it was doing fine for AMD. I’d point out that I’d already said that financially the chip flopped for AMD too.

            K5 was estimated to cost AMD something like $1 billion in sales if I remember correctly. They had to take out a loan for around 4-500 million dollars to build some foundry space because of that but otherwise the company was still operable and selling parts. Bulldozer cost much much more than that over the years, I dunno how to estimate how much but its clearly multiple billions of dollars to say the least.

            CPU’s typically take 3-4yr to design these days but back then it was supposedly around half of that. K7 design was started in 1998 and they had the chip ready by late 1999 for instance. K5 design work started in early 1994 I believe and should’ve been ready by mid 1995, delays messed that up though. A year is long time from that perspective.

            • ronch
            • 3 years ago

            No way can those CPU projects havd been completed in such short periods. Ive read somewhere that K7 was put together in record time but it wasn’t just one year. It was more like 3 years, with the project having been started in 1996. K5 was started in 1992 based on what I’ve read on PC Mag in a 1994 issue and took 3 years before actual release. Bulldozer took 6 years, for whatever reason. Mike Butler, BD chief architect, mentioned in 2011 that they’ve been working on it for over 6 years. Zen was supposedly started in 2012.

            These days it’s harder than ever to design a leading edge CPU core. Even with automated design too!s and libraries it’s considered best practice to lay out critical circuits by hand.

            • mesyn191
            • 3 years ago

            Those are the public numbers I can remember/find.

            K5 design wasn’t started in 1992. They started planning for it back then, getting the design team together I think, but the actual design work was done very quickly. There were articles from 1994 that had all of the architectural details published, quite a interesting read too. Microprocessor Report Vol. 8 Number 14, Oct 24 1994, claims the roots of K5 go back to 1989 and seems to suggest much of the ideas used in it were originated from Mike Johnson.

            The chips were just so much smaller then and simpler in design goals. No 128 bit FPU’s, no power gating, tiny simple caches, everything really. You don’t believe that makes a difference?

            Yes modern designs take much longer to pull off. BD took so long because they scrapped and started over at least once on it I think.

            • ronch
            • 3 years ago

            [quote<]The chips were just so much smaller then and simpler in design goals. No 128 bit FPU's, no power gating, tiny simple caches, everything really. You don't believe that makes a difference?[/quote<] Yeah. K5 didn't even have MMX or any sort of instruction that departs from the fundamental 32-bit x86 ISA. But I think back then you have fewer engineers available (today there's one at every corner of Silicon Valley) and budgets were far smaller as fewer people bought computers. Today because of the proliferation of computers companies can hire more engineers, plus today's design tools probably help a lot in accelerating projects. Back then they probably had to do pretty much everything by hand. I dunno. But it's my general perception that CPU design projects take about 4-6 years to complete. Sometimes 3 if the engineers are kickass and there are no slip ups. I've heard somewhere that BD had some big problems during development. But why did Mike Butler say "it's been over 6 years that we've been working on this core"? Or did he say that in part to conceal the stalled project? Still, I also think 6 years is a little long. Aside from the shared resources there's nothing really that leading edge with BD. I am guessing they tried to do reverse hyperthreading but gave up later on and instead settled for what we have now. They say a BD module has two tightly coupled cores, but really, each core does it's own thing and isn't really tied to the other adjacent core.

            • mesyn191
            • 3 years ago

            I have no idea how many engineers were on their team back then nor of the industry’s supply of qualified personnel to design something like that. If they were doing in-house custom RISC designs like the 29K then I really have a hard time believing they only had access to a small team of people.

            I don’t know anything about the tools either that AMD had at the time, though I would point out VHDL had been standardized by the early 90’s. Its almost a sure thing they had some custom VHDL compiler at least that was tuned for their in-house process by then. I know the “old way” of doing things by hand done layouts was on its last legs with the 486 era designs.

            I think any of the public commentary by the people on the design teams is going to be heavily hedged. Its generally verboten to embarrass the company you work for by airing its dirty laundry. The rumor that they had to scrap their initial work and start over was one of the few that I put much stock in since its the only way BD’s long development time really make sense. Especially for what turned out to be such a mediocre chip.

            • ronch
            • 3 years ago

            I think back then Cyrix only had ~30 engineers working on their early CPUs. Today teams probably have hundreds of folks. And of course, design tools are better and I bet parts of previous products can be recycled instead of being designed from scratch.

            • just brew it!
            • 3 years ago

            Jim Keller worked on the Alpha, the K7, and Zen. So while it is true that K7 and Zen were not based directly on Alpha, there’s a common thread there, in that the same person worked on the design of all three.

            Keller’s gotta be pretty close to retiring by now. Let’s keep our fingers crossed that he still had one more great chip up his sleeve.

            • mesyn191
            • 3 years ago

            Of course but 1 man doesn’t design a CPU. Its flat out facetious to try and attribute the designs like that!! I don’t know the exact sizes of AMD or Intel’s design teams but I’ve seen off hand mentions of it being in the hundreds of people.

            I know VIA had a CPU design team of about 50 people at one point but that is VIA and their designs really are probably a reflection of their limited resources if anything else.

            • just brew it!
            • 3 years ago

            While one man does not design a CPU, one man in a position to make critical design decisions CAN make or break a CPU.

            Edit: He was also the lead architect of the K8, and designed the x86-64 instruction set. So I’d say he has been [i<]very[/i<] influential. It is quite possible that AMD would not have achieved the success they had with the K8 (or derailed Intel's Itanium project) without him. Sure, it might just be coincidence that the Bulldozer architecture (the only one since the original Athlon that was a complete flop) was the one he wasn't involved in, but if you're having an existential crisis you want to cover all the bases; I assume this is why AMD enticed him to come back for the Zen project.

            • ronch
            • 3 years ago

            The K8 we bought wasn’t from Jim. AFAIK Jim worked on the original K8 but it was axed. Fred Webber and team were tasked to hack a second K8 project together. This is probably why the K8 we know was practically just a K7 but with 64-bit, LDT and an IMC tacked on.

            This is what I know. If anyone else has anything to add or correct, please do so.

            • just brew it!
            • 3 years ago

            OK… if that’s true maybe he had less influence on the K8 than I thought. I wonder if Jim’s version of the 64-bit instruction set still make it into the final K8…

            • ronch
            • 3 years ago

            I came across some rumors before that the original K8 was a very ambitious and wide design. I don’t know why it was canned. Perhaps it was too huge to fab back then?

            Crazy theory: if it was too big to fab back then, WOULD IT BE POSSIBLE that Zen is ACTUALLY the original K8 brought back from the dead? 14nm makes it a no-brainer to fab. Also, if Zen is a very wide, ambitious core meant to bring AMD back to contention with Intel’s very advanced cores, it wouldn’t have been easy for AMD to hack it together in such a short while (2012 to today). Could it be….???

            • mesyn191
            • 3 years ago

            There were rumors that the K9 was supposed be super huge, wide, and lean heavily on SMT (think 8+ threads per core) but it got canned because the execs thought it was too risky. Rumor was that was why Keller left the first time.

            This is all Yahoo message board investment rumor mongering that I have trouble remembering from that time period so its fine if you want to pan it. Just thought it would be interesting to give the scuttlebutt that was floating around at the time.

            I think Zen might be as much of a derivative of K7 as Sandy Bridge was a derivative of the Pentium M. Which is to say maybe it takes some inspiration from it but otherwise its very different.

            • ronch
            • 3 years ago

            The fact that K8 was a direct evolution of K7 and K10 is largely an enhanced K8 strongly suggests that the K8 we know and K10 were both hastily designed to replace canned projects. It would be curious to know exactly what the original K8 and K9 projects were, if these rumors are true.

            • mesyn191
            • 3 years ago

            I would too but very little leaked publicly. None of the people involved seem to want to say anything still.

            There has been other commentary that has leaked over the years that AMD’s execs have their head up their collective asses but I think that has been fairly obvious for a while now. I just hope that most of the people who left a while back were the ones screwing things up.

            • ronch
            • 3 years ago

            Here’s an interesting Wikipedia page:

            [url<]https://en.wikipedia.org/wiki/Talk%3AAMD_K9[/url<] I'm kinda guessing from what I read there that K9 (a speed demon design that didn't work out) somehow found parts of itself in K10 and some into ... Bulldozer. Yes I know I'm starting to go too far but it would be interesting, wouldn't it? The above URL also references these: [url<]https://web.archive.org/web/20070906163444/http://www.theinquirer.net:80/default.aspx?article=27421[/url<] [url<]https://web.archive.org/web/20070210133934/http://www.theinquirer.net:80/default.aspx?article=37444[/url<] So there WAS a K9 project, and another K10, maybe. AFAIK Barcelona used the K8L. I saw a die shot of this 'future' K8L prior to the Barcelona launch and it was practically the K10 that shipped in Barcelona. Maybe there were TWO projects, K9 and K10, that were actually canned and K8L had to just get onstage and continue the show? Then also some folks say K9 was the dual core implementation of K8 but I think it would be kinda nuts if AMD jumped the gun and incremented the Kx digit when each codename have always referenced individual core designs, not putting two of those together.

            • mesyn191
            • 3 years ago

            Thanks for digging those up, interesting read and a walk down memory lane!

            I hope that one of these days some of the people do a tell all about it. Must’ve been some damn interesting stuff going on.

            • ronch
            • 3 years ago

            Ditto. But I don’t think that will ever happen. Maybe if AMD goes under someone who was working there through all those projects would write about it all?

            • Anonymous Coward
            • 3 years ago

            If K9 was what you describe, I’d have to agree with the exec’s. Its risky to deviate much from what is known, see Bulldozer. These are huge and complicated things to design and manufacture, many years of work before the result can be known.

            Power8 has 8 threads, good clock speeds, and is pretty wide. Would be nice to know how it would perform in a “desktop” role. IBM has also made bad designs, see Power6 which was in-order executing and clocked high, but they are I guess somewhat insulated in their niche.

            I’m no expert, but I think anything that can juggle 8 threads will invest enough hardware in supporting it to loose some single threaded performance, by having lower clock speeds for example.

            An 8-threaded core would also be a poor fit for desktop. As a throughput-oriented server chip it might be very effective.

            • ronch
            • 3 years ago

            Check out my reply to mesyn191 above. The one that starts with “Here’s an interesting…”

            • mesyn191
            • 3 years ago

            You could be right. There is no way to be sure though. What was described sounds a bit like POWER8 doesn’t it?

            And POWER8 is a good chip, but its huge, power hungry, expensive, and runs hot. For the market IBM sells in that is all acceptable but if K9 had turned out like that then yes it might not have done very well at all…unless the performance on general purpose software was stellar.

            I would point out that SMT generally makes use of idle resources on a core to run extra threads so I don’t believe there is any particular reason to assume that just because a given design has a extreme SMT implementation (8+ threads seems pretty extreme to me, especially in the x86 world, there may be designs that exceed it though for all I know) that it would have to give up single thread performance.

            From what I understand the trouble with SMT is that its damn hard to design and test properly but the actual hardware resources needed by it are minimal.

            • ronch
            • 3 years ago

            A core will have to be super wide for 8-way SMT to make sense. I think the latest SPARC design does feature this extreme form of SMT. Makes Hyperthreading™ look like a puppy.

            • Anonymous Coward
            • 3 years ago

            Ultrasparc T series are/were narrow and high clocked, but packed with threads. Neat idea. It is irrelevant if there are high latencies because they just always switch to a different thread, the early versions were even in-order. Totally dissimilar to any recent big Intel core.

            I should read up on their new Sparc M7. Probably not like the previous T series.

            • Anonymous Coward
            • 3 years ago

            [quote<]From what I understand the trouble with SMT is that its damn hard to design and test properly but the actual hardware resources needed by it are minimal.[/quote<] Well, I'm no expert but they'll at least have to duplicate the registers however many times, and the caches would need to be a lot bigger to manage the increased number of likely unrelated tasks being run, I would imagine also corresponding duplication of the hardware to manage out of order instructions. This should increase latency on the most common operations, while also increasing costs. If the objective is throughput computing then the latency can be hidden because there is usually some other thread ready to go, but I'm not seeing that going anywhere on a desktop application. Intel has had plenty of time to step up to for example 4-way SMT if they cared. Other server chip makers have gone pretty far with SMT, and tried different strategies, for example switching between threads round-robin but not mixing instructions from different threads on the same cycle. I think Intel's lack of movement suggests pretty well that they regard 2-way SMT has optimal. Throw in Bulldozer and sharing components between two cores, and I have to say this area is well explored by now. A shame that Bulldozer didn't shine. Like an 8-way SMT on desktop, it was OK but never optimal.

            • mesyn191
            • 3 years ago

            Which is something that is completely different from what Klimax and yourself were saying.

            And he didn’t come back to AMD for Zen. He came back primarily to work on their ARM project and helped some on Zen too. Its the tech media that seems to be playing him up as a CPU design god who makes or breaks designs. Which is laughable. Especially when you had people like Dahm working on the K7 too.

            • ronch
            • 3 years ago

            The K8 we bought was actually hacked by Fred Webber, not Keller. Webber came in from Nexgen.

          • terranup16
          • 3 years ago

          Jim………………….

          Keller.

        • bwcbiz
        • 3 years ago

        To be fair, AMD has been stuck on 22-28 nm process nodes for ages. So the performance they’ve managed to eke out of successive generations of that node is pretty impressive. If they can score as big a performance jump with Zen as they seem to have with Polaris on the GPU side, they may actually become competitive again.

          • ronch
          • 3 years ago

          They had no choice but to squeeze as much performance from Steamroller and Excavator. Not that they really moved the needle far. They had no choice though: spinning off your fabs can give you this scenario.

    • Generic
    • 3 years ago

    I’m sorry; but TechReport really needs to step up its game.

    [url<]http://preview.tinyurl.com/hlmj3a7[/url<] Seven, count them, [b<]SEVEN[/b<] purports!

      • RAGEPRO
      • 3 years ago

      Sorry about the downvotes; I laughed. I’ll try to step it up.

        • Generic
        • 3 years ago

        I’ll take my lumps in stride.

        I much prefer the restraint found here to those shock jocks over at Ars! 😉

    • willmore
    • 3 years ago

    Any word on how they’re going to be linking the dies together? I’m just wondering on what the advantage of four dies + and interposer vs four dies on four packages in four sockets on a motherboard.

    One is clearly more dense, but density isn’t a benefit when you’re thermally limited–which isn’t uncommon in HPC servers.

    The interposer solution could allow for much faster die-to-die communication, but then you’d have a more complex NUMA architecture than we’ve had in the past. Currently we have “my memory” and “somebody elses memory”. That latter type could have a varying amount of latency, but the bandwidth to it was determined by the package-to-package link speed. Now we will have “my memory”, “my siblings memory”, and then “my cousins memory”. Each layer dropping in bandwidth and increasing in latency.

    Still, it’s better than the four packages solution *if you have a lot of inter process communication*. For a “more cores” type of virtualization or web server, it’s not worth the pain of the interposer.

    But, it’s nice to have options, isn’t it?

      • mesyn191
      • 3 years ago

      The advantage of a MCM or interposer linked 32 core chip would be inter CPU and cache bandwidth and latency reduction vs a 4 socket mobo. So better CPU scaling for the sorts of software that would make use of that many cores (IOW servers, HPC, and maybe VM’s).

      If anything I’d think the extra bandwidth and lower latency from a MCM/interposer would make a large and complex cache/memory NUMA architecture easier to do. AMD pulled it off in the past for 8 socket CPU systems when they only had HT1.0 which was limited to 12.8GB/s. Its when you’re trying to hide the latency on a high latency bus and communicate with limited bandwidth with more than a handful of cores that NUMA becomes overly difficult to do.

      Given the large amount of rumored PCIe 3.0 lanes I’d assume they’ll have at least 2 socket and probably 4 socket version motherboards that will accept these 32 core behemoths. Latency will be pretty ho hum, because its PCIe, but bandwidth should be good enough.

        • BaronMatrix
        • 3 years ago

        The disadvantage is previous Opteron MCMs were limited to 4P the way NUMA worked with Hypertransport… So they have to update Hypertransport since Zen is a quad core unit… Unless they make an 8 core unit…

        But that stil means MCM to get to 32… Or even 16… I guess we’ll hear about that all at the Fall Analysts Meeting…

          • mesyn191
          • 3 years ago

          Nope. There were 8S Opterons that used HT1.0. They just were very uncommon and specialized for HPC stuff. Most white box vendors and other OEM’s only sold 4S versions because they would still perform well enough on generic software.

          It actually was capable of scaling to 16S but I don’t think anyone ever bothered with that even in the semi custom HPC high end. The per socket latency and bandwidth was just too terrible.

          Other than high latency and low bandwidth there were no other real significant issues with HT and NUMA.

            • BaronMatrix
            • 3 years ago

            They weren’t MCMs… HT NUMA has node limitations and MCMs appear as two nodes…

            • mesyn191
            • 3 years ago

            That doesn’t matter. The gory details of how the CPU’s were connected is hidden from the bus by the network controller. What matters for NUMA is bandwidth and latency.

          • BaronMatrix
          • 3 years ago

          Here’s hoping none of you down-voters ever need me for anything… If you don’t like me SKIP IT… If I’m wrong menion it… But everyone knows Opteron MCMs couldn’t go above 4P… Unless you don’t apy attention…

          Sounds about right…

            • mesyn191
            • 3 years ago

            No one likes getting down voted, happens to me ALOT sometimes, but complaining about it or feeling actual hurt is pointless.

            And AMD limited some of their later single die products to 2S or 4S only too at times you know. For whatever reason they couldn’t or wouldn’t provide more HT links/buses to improve inter socket bandwidth and latency.

            Perhaps they decided trying to shoot for more sockets just wasn’t worth it. Anything above 4S has been very niche for a long time now due to the high price and customization such systems typically demand. The higher core counts on a per die basis have made them mostly unnecessary too.

            Why spend $14K+ (some of the HP 8S systems went for around that price, but I’m going on memory) on a 8 socket system when you can buy 2 4S systems for $3-5K a pop? Unless you’re doing something very specialized the 8S system just doesn’t make financial sense.

      • ronch
      • 3 years ago

      Times are tough. They stick two dies together with Scotch Tape™.

    • albundy
    • 3 years ago

    how are they going to get customers back from intel?

      • brucethemoose
      • 3 years ago

      What customers?

      Honestly, I don’t know who the heck is buying Bulldozer Opterons over Haswell/Broadwell Xeons these days.

        • the
        • 3 years ago

        “These days” -> people bought Opterons in the server space before they released Bulldozer and then gave up in this segment.

          • Klimax
          • 3 years ago

          Those are mostly long gone. Too much time and too many upgrade cycles.

        • albundy
        • 3 years ago

        sorry, forgot to put /sarcasm at the end. but yeah.

      • Krogoth
      • 3 years ago

      Providing platforms with lower TCO.

      • Kretschmer
      • 3 years ago

      If AMD knew the answer to that, we’d see it in action. I think that they’re going to try and nibble around the fringes where Intel isn’t as interested.

      • BaronMatrix
      • 3 years ago

      Cray is DROOLING for a new Opteron.. Titan in Oak Ridge is number two and still has Opteron and K20s…

      HSA APUs with Vega FirePro will be a devastating combination… China is already ready to buy Zen servers…. Hell, even with just 16 cores and Vega I believe it will beat Knights Landing and Xeon…

      DOWN VOTE AWAY BROOD…

        • JumpingJack
        • 3 years ago

        Cray unceremoniously removed AMD from their product stack many years ago because they delivered late and delivered under-performing parts. I seriously doubt Cray is currently drooling for anything AMD as AMD has lost their credibility with that customer having publicly cost cray 100s of millions in lost revenue.

        “Trust takes years to build, seconds to lose, and forever to repair.”

          • Waco
          • 3 years ago

          This. Cray is unlikely to offer AMD again unless Zen is such a knockout in performance and power efficiency that it behooves them to do so.

    • ebomb808
    • 3 years ago

    Can we project the power requirements for an 8 Core Zen CPU in a potential Xbox Scorpio APU?

      • Anonymous Coward
      • 3 years ago

      Sure no problem, I project 25W. Clock speed unknown.

      • ronch
      • 3 years ago

      I’m guessing somewhere around 100w at standard desktop clocks.

      • faramir
      • 3 years ago

      Of course:

      TDP for 8 core Zen will be under 100W (because: psychology) and clock rates will be adjusted accordingly.

      Models with fewer cores (4, 6) will not scale proportionally so they will be able reach higher clocks and offer better single-threaded performance.

      • NTMBK
      • 3 years ago

      Maybe they could fit it into Scorpio if they drop the clocks way down to like 1.6GHz… but to be honest I’d just expect them to use a high clocked Jaguar core.

        • mesyn191
        • 3 years ago

        Clocks won’t effect the die size. Putting a 8C/16T Zen on die with what is probably a RX480 would blow out the die size massively. They’d never make money on it. So that won’t be happening.

        Jaguar is stuck at ~2Ghz clocks for the power envelope they have to work with. The design decisions to keep it low power and simple limit it quite heavily.

          • NTMBK
          • 3 years ago

          Good point.

          Well, given that Scorpio is not going to have any exclusives (every Scorpio game also needs to run on XBox One), it does make sense- they need to run the same CPU engine on both, so CPU load won’t go up much.

            • mesyn191
            • 3 years ago

            Yeah backwards compatibility is huge since Scorpio is supposed to be a “updated” XBO.

            There is also the issue that if they want to stick with x86 and keep power usage low and die sizes reasonable there really isn’t anything else out there they can license. Maybe Puma+? Still AMD but a bit lower power usage with a bit higher clock speed.

            Intel wouldn’t let them use their Atom CPU’s without using their fabs too and they’re too expensive. On top of that they don’t really offer much in the way of a big clock speed or performance improvement over Jaguar or Puma+ either to justify such a switch.

      • mesyn191
      • 3 years ago

      Highly unlikely it’ll use Zen. Its nearly a sure thing they’ll stick with Jaguar to keep the die size down since they’re still supposed to be doing a APU.

    • Mr Bill
    • 3 years ago

    Naples Beowulf Cloister combined with AMD FirePro S7100X blades.

      • Mr Bill
      • 3 years ago

      Too much? [quote<]A cluster [shurely that should be cloister.ed] [/quote<]

    • tipoo
    • 3 years ago

    180W max for the 32 core, so that makes the 32 core at full bore draw less power than some of the 8 core FXs of today, right?

    Seems positive. Then again the higher core counts are probably also clocked lower (same as Xeons, more cores generally go with lower clocks to keep power draws not insane), while they were trying to make Bulldozer look good by clocking it as high as they could, efficiency point be damned.

      • brucethemoose
      • 3 years ago

      There are some 16 core bulldozer Opterons with sane TDPs, but like you said, their clockspeeds are very low.

      • south side sammy
      • 3 years ago

      6core 12 thread 140watt for Intel last time up?

      funny, I guess I pegged it right. if it’s not nvidia or Intel this site bashes it. can’t anybody ever see the other side of the coin? consumer gets something good/better(?) for less. Intel craps pants…. nvidia in scramble to lower prices so consumers feel less ripped off…….. just sayin’……………..

        • Waco
        • 3 years ago

        Nobody is bashing AMD more than they deserve. A 180W dual or quad-chip module is going to be clocked extremely low, no consumer would want it. That’s just how things work.

        I’m looking forward to the 8-core Zen chips, but my hopes are tempered by AMD’s usual track record of screwing things up royally in terms of hype and expectations.

        Intel is not crapping their pants. Nvidia isn’t scrambling to lower prices. Why the hyperbole?

        • auxy
        • 3 years ago

        What are you even talking about? Nobody is bashing the Zen CPU here! (╬ಠ益ಠ)

        The news post has a pretty positive tone toward it and tipoo was praising AMD for fitting 32 cores into a lower power envelope than AMD’s current top 8-“core” chips. So where do you get this “bashing” from?

        I’m an AMD fangirl and I’m telling you right now that you are the worst class of fanboy. You rush to defend your patron against even IMAGINARY insults. You need to stop to read everything at least twice before you post.

          • Kretschmer
          • 3 years ago

          Well, I bash Zen enthusiasm if not the chip itself. I’ll let the reviews bash Zen. 😉

          Take your +1; it makes me feel dirty to upvote a post with an emoticon.

        • Klimax
        • 3 years ago

        It would be good idea if you left Red Zone and actually looked at real world instead of AMD BEST imaginary. Also reading comprehension upgrade would be good thing…

    • tsk
    • 3 years ago

    LGA socket, isn’t that odd since AM4 will have a PGA socket?

      • chuckula
      • 3 years ago

      It’s not really odd for a large scale server chip.
      AMD has been using LGA sockets in Opterons for years.

        • tsk
        • 3 years ago

        Ah okay, I didn’t know that.
        I always thought AMD used PGA, but now that I think of it, I’ve actually never seen an Opteron real life.

          • just brew it!
          • 3 years ago

          Older Opterons were PGA (and there were even some low-end Opterons that were compatible with Socket 939 consumer motherboards). Opterons switched to LGA a couple of generations ago.

    • anotherengineer
    • 3 years ago

    “128 PCI Express 3.0 lanes”

    pffffff that’s it?!?!

    • dikowexeyu
    • 3 years ago

    Bring 32 cores to the desktop! Please!

    I can’t stand 10 cores at 1700$

      • chuckula
      • 3 years ago

      Hahah. $1700. What a budget part.

      • ronch
      • 3 years ago

      You can get a 4.0GHz 8-core part for $160 right now.

      (ducks)

    • Takeshi7
    • 3 years ago

    I can’t wait for the first AMD motherboard with 8 16x PCIe slots.

    Octo-Crossfire is the future of VR gaming.

      • brucethemoose
      • 3 years ago

      4 GPUs per eye.

      Set up some dual-GPU SFR magic, throw in something like Nvidia’s SLI-AA on top of that, and you have a perfectly reasonable way to use 8 GPUs in VR!

    • chuckula
    • 3 years ago

    I don’t think Naples is a good codename.

    I’d prefer to call this: Project M.O.A.R.

    I’d also like to produce a series of direct-to-DVD movies about it.

      • Neutronbeam
      • 3 years ago

      How about direct-to-VR movies instead? DVDs are SO last year.

        • Wonders
        • 3 years ago

        Yeah, but who want to mess with multi-monitor config to get a VR movie working under Windows 10? What we really need is a direct-to-DirectX 12-direct-mode-VR movie.

      • just brew it!
      • 3 years ago

      An oldie but goodie: [url<]http://www.bbspot.com/news/2000/5/amd_moron.html[/url<]

        • jackbomb
        • 3 years ago

        Good thing I wasn’t sipping coffee when I read that.

        • ImSpartacus
        • 3 years ago

        I lost my shit at that one. You win the internet.

      • The Dark One
      • 3 years ago

      I hope someone with a sense of humour has nicknamed the 180W SKU “Vesuvius.”

        • crabjokeman
        • 3 years ago

        They already used that code name internally for the FX-9000 series chips (220W).

          • f0d
          • 3 years ago

          i thought it was for the 295X2?

          [url<]http://www.guru3d.com/news-story/amd-radeon-vesuvius-has-two-hawaii-xt-gpus.html[/url<]

            • auxy
            • 3 years ago

            Yes. The 295X2 is “Vesuvius”.

            The FX-9000 chips were called “Centurion”. Presumably because they were soldiering on despite everything. (*’▽’)

            • Srsly_Bro
            • 3 years ago

            Auxy, thanks for your posts. I really do like them. <3

      • ronch
      • 3 years ago

      Yeah. Naples is not good. That’s gonna morph into something else real quick. Especially with SSK around here.

    • chµck
    • 3 years ago

    [quote<]Fudzilla says Naples has an integrated 10-gigabit Ethernet controller, too.[/quote<] That's a welcome first.

      • Andrew Lauritzen
      • 3 years ago

      Not first for server parts of course, but definitely welcome! And PRETTY PLEASE let that come into the consumer enthusiast parts as well – more important in a lot of power user use cases than more cores.

        • Krogoth
        • 3 years ago

        Not likely.

        10Gbps and beyond is prosumer-tier since there’s no killer mainstream app that renders 1Gbps Ethernet woefully inadequate. The masses prefer wireless Ethernet over wired Ethernet.

        Power users are more than willing to pay for current prices for 10Gbps equipment so there’s no incentive for network guys to lower prices.

          • Andrew Lauritzen
          • 3 years ago

          I agree that it’s not likely, but I’d put anything >4 cores into “prosumer-tier” as well. So while that is easier to market, it really has no more positive effect on the consumer experience than 10Gbit, so if they are going to do one, might as well do both 😉

            • Krogoth
            • 3 years ago

            Again, the 10Gbps+ wired Ethernet demographic are prosumers and enterpirse-types. They are more than willing to pay for current price levels. There’s no profit motive for networking guys to expand onto mainstream market when they prefer wireless Ethernet solutions.

            Honestly, the whole thing is a non-issue. You have Thunderbolt 3 and USB 3.1 handling almost any non-server ultra-high bandwidth need.

            • anotherengineer
            • 3 years ago

            But can I get a 24 port thunderbolt 3 switch and make a home network out of it, and do all PC’s have thunderbolt 3?

            • Andrew Lauritzen
            • 3 years ago

            Thunderbolt and USB are fundamentally very short ranged. If you want longer range you end up having to get something like a TB 10gbase-T NIC… which are no cheaper (and in fact often more expensive) than a PCI-E 10gbase-T NIC in the first place.

            So no, it’s not a solution beyond devices that you are going to sit beside your box.

            • Andrew Lauritzen
            • 3 years ago

            I’m not sure I agree with that. There’s an increasing trend for folks to have things like USB drives attached to the their routers or to the little file server like boxes. These things can easily already saturate a gigabit link even with a single spinning rust drive let alone RAID or SSDs.

            Add to that the rollout of gigabit internet to various places. Now your LAN isn’t even faster than your internet and you have nowhere to go in the future without upgrading.

            Like I said, while I agree this stuff isn’t relevant outside of “prosumers” and enthusiasts (most folks just use wireless and pretend it’s fast), I disagree that that demographic is completely price insensitive. Enterprise isn’t, but enthusiasts are – just look at the response to the $1700 BDW-E chip. I can speak for myself here too: if 10gbit gear was roughly 1/2 the price it is today I’d probably jump onboard, but it’s just slightly too ridiculous for the cost : benefit to work out for me right now.

            ASUS seems to agree with me in that they are apparently working on consumer 10gbit gear (switches, NICs). Still, it would be better to just have this stuff integrated on-chip and it clearly can’t be *that* expensive to do as we have Xeon D as a nice comparison. A Xeon D chip + motherboard w/ 2x 10gbase-t + 2x gigabit barely costs more than a single 2x 10gbase-t NIC! You could obviously cut it down somewhat as most folks – even prosumers – would be fine with 1x 10gbit + 1x gigabit.

      • Anonymous Coward
      • 3 years ago

      I wonder how that would work out with a multi-chip module. Multiple gig-E, also present in the base 8-core module?

        • BaronMatrix
        • 3 years ago

        That’s the $64K question… Opteron HT had a linitation in sockets with NUMA nodes… You couldn’t go 8P… A regular 8P would be 32 cores, but if they can eliminate the limitation they can have a 256 core 8P box…

        That will bring Cray RUNNING back…

          • Waco
          • 3 years ago

          No, Cray won’t care. They’re not in the business of selling cores, they sell systems.

          Unless there’s enough memory bandwidth and power efficiency, Cray is unlikely to return to selling AMD parts.

      • Welch
      • 3 years ago

      Yeah that raised my eyebrows a bit. You’d have to match it with a motherboard with 10g obviously. Hopefully the addition of that chip doesn’t shoot the price up out of the roof. 10g is not cheap at this point.

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