Intel announces next-gen Knights Mill Xeon Phi accelerator

You may all be wondering what's up with the Internet's coverage of IDF, since there wasn't a lot of news coming from that front yesterday. And yet, all of a sudden, something big comes along. The item in question is called Knights Mill, a codename for the next generation of Intel's HPC-oriented Xeon Phi processors.

Our own Jeff Kampman has his boots on the ground as we speak, and he took a snapshot of Intel's announcement during a session:

Put simply, Knights Mill is an upgraded version of the current-generation Knighs Landing CPUs. For those to whom either "Xeon Phi" or the whole "Knights" naming doesn't really ring a bell: these CPUs differ from the more "normal" models by offering many dozens of small cores instead of a few "big" ones. They're targeted at HPC and machine learning tasks. One perusal through Intel's ARK is all you need: the current-generation models pack somewhere from 64 to 72 cores and many more threads.

Intel says the Knights Mill models should offer better efficiency when compared to their predecessors, as well as "enhanced variable precision," which we take to mean improved floating-point support. Like current chips, Knights Mill CPUs will have a slice of RAM directly stacked on top of CPU (current Xeon Phis pack 16GB.) The company hopes the new CPUs to be gracing enormous clusters worldwide come 2017.

Since we're on the topic of Knight's Mill, it's interesting to look back at how the perceived-as-failed Larrabee went from being advertised as a graphics card to actually power the "Knights" series of Xeon Phi CPUs. In a personal blog entry, Larrabee architect Tom Forsyth lays out a bit of history on the chip and goes on to detail what it was meant to be, what it wasn't, and the public perception of the whole thing. If the fact that "Larrabee = Xeon Phi" comes as an overlooked and surprising fact (including to a good portion of the TR staff), by all means, go read Mr. Forsyth's account.

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