GlobalFoundries skips the 10-nm node on the way to 7-nm FinFETs

GlobalFoundries recently announced it would be adding a 12-nm node to its FD-SOI roadmap, and it's now announcing a more mainstream node for high-performance silicon: 7-nm FinFET. That move follows reports that the company would make exactly this move last month. Surprisingly, GloFo says it'll achieve this shrink using optical lithography alongside "EUV (extreme ultraviolet lithography) compatibility at key levels." The move to 7-nm transistors is claimed to offer 30% higher performance and two times more logic density compared to GlobalFoundries' 14-nm FinFET process.

The company also expects to re-use much of its existing 14-nm infrastructure to produce 7-nm parts at its Fab 8 campus in New York. Even with that re-use, GlobalFoundries will still invest billions of dollars in that plant to make 7-nm production possible. The expected payoff for GloFo is that it'll be able to begin 7-nm production more quickly than it otherwise might.

While one might be led to believe that GlobalFoundries is using the same silicon-germanium (SiGe) 7-nm technology that IBM showed off before it more or less paid GloFo to take its fabs off its hands, we're guessing that's not entirely the case. We've asked GlobalFoundries what the degree of overlap is between these technologies, and we'll update this article with more information if GloFo shares it.

GloFo says it'll continue its partnership with silicon design and intellectual property developer Invecas so potential customers will be able to get help building their products on the 7-nm FinFET process. The company claims that it's already making 7-nm test chips at Fab 8 with "IP from lead customers." "Customer design product starts" should begin in the second half of 2017, while a "ramp to risk production" is expected in early 2018.

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