Toshiba prepares a 96-layer 3D NAND parfait


— 2:32 PM on June 28, 2017

Toshiba's announcement of four-bit QLC NAND flash isn't the only big event in the realm of flash memory production today. The company has also let the world know that it's begun producing fourth-generation BiCS TLC 3D NAND silicon, developed in a joint venture with Western Digital. The new generation chips stack 96 layers in order to build 256 Gb (32 GB) packages.

The announcement of 96-layer production follows the last leap to 64 layers, a technology that started showing up in consumer products earlier this year. NAND endurance generally decreases with shrinking feature size, so increasing the number of layers represents a way to increase data density without shortening a drive's lifespan. According to Toshiba, the new layer arrangement works out to a 40% increase in storage density when compared to previous-generation 64-layer technology.

Toshiba also has plans to apply the 96-layer manufacturing process to producing larger 512 Gb (64 GB) 3D NAND chips and QLC silicon in the future. The 3D TLC chips described in this announcement are designed for use in consumer electronics devices like SSDs, smartphone storage, and memory cards. These new chips will be produced in Toshiba's facilities in Yokkaichi, Japan starting in 2018.

Tip: You can use the A/Z keys to walk threads.
View options

This discussion is now closed.