Note that later VIA chipsets such as the P4X266A and KT266A no longer have their IDE controllers mapped to the PCI bus (see the block diagram here), so using the on-board controllers should get you around this difficulty. This workaround unfortunately will not help with PCI cards or on-board PCI IDE or SCSI controllers, all of which would map directly to the PCI bus.
VIA might get lucky, though. The problem might only be an incorrect register choice instead of a fundamental flaw. George Breese of VIAHardware.com fame has managed to paritally alleviate the issue with his latest tweak. You can see here that his tweak shows encouraging results, but still leaves the VIA chipsets lagging behind the competition. Assuming VIA can correct the problem through software, let's hope that those changes to the BIOS or 4-in-1 drivers won't create new problems or cause performance in others areas to suffer.
I feel this problem is pretty serious, especially with the proliferation of IDE RAID. While I might could see why the bug was not detectable on the MVP3 because of a lack of applications with the necessary bandwidth requirements, the problem remained straight into today's newest core logic chips. Today such applications are abundant. It seems improbable to me that VIA was not aware of the issue. VIA, might I suggest you follow in your competitors' footsteps (Intel) and release the specification sheets for your chipsets to the public, errata and all. Being open and truthful is an amazing way to avoid the appearance of improprietynot to mention a great way to make me eat crow.
We will follow up with VIA and see what they have to say about this issue.