Purdue researchers find a groovy method for cooling stacked chips

— 9:12 AM on October 31, 2017

We've had the ability to stack chips and create multi-die packages for a while. Cooling powerful chips is a hard task, however, and so far multi-layer designs have primarily been used for low-power products like NAND flash chips. That might change in the near future. Researchers at Purdue University, working under a grant from DARPA, have developed a new way of cooling microprocessors using boiling dielectric fluid passing through micro-channels in the chips themselves.

Micro-channel cooling isn't a completely new idea, but the breakthrough in this case was the use of short and narrow channels—as little as 10 microns in width—that run through the chip in parallel. They connect to what the researchers call a "hierarchical manifold" that distributes the flow of coolant through the channels. The micro-channels are 20 times deeper than they are wide, and as the HFE-7100 coolant boils up through the micro-channels, it rapidly removes heat from the chip.

This technology could allow DARPA to cool power-thirsty super-computers and radar electronics, but it has exciting prospects in the consumer market as well. The Purdue team managed to chill a chip producing 1 kW of heat within one square centimeter. That's an impressive heat density, yet it's not all that far removed from the sort of heat output we've seen coming off of Intel's Skylake-X chips when overclocked.

Common PC CPUs and GPUs are mostly single-layer designs that can be adequately cooled in traditional ways, albeit with some effort. As the Purdue researchers point out, a stacked design means that the lower-level chips can't be cooled directly using traditional methods (read: heatsinks). Using intra-chip micro-channels to pass cooling fluid directly through the chip or chips allows for cooling multiple levels of microprocessors simultaneously. The design is pretty exotic, and it's not likely to be something we'll see in our desktops anytime soon. It's a clever technique though, and it could be a major breakthrough on the road to ever-higher microprocessor performance.

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