David Kanter dissects Intel's 22-nm FinFET Low Power process tech

Recent discussions of Intel's process technologies have generally focused on the company's arguably diminishing lead over pure-play foundries. Proprietary designs on cutting-edge processes aren't the only way that Intel builds chips, though. The company announced its 22-nm FinFET Low Power (FFL) process last year for potential clients of its custom foundry offerings.

We didn't go in-depth on 22FFL at the time, but long-time friend of TR David Kanter has written another one of his amazingly in-depth technical analyses regarding the virtues of 22FFL and the ways that Intel has tailored this offering for potential customers whose chips might not primarily comprise the high-performance digital logic that butters Intel's bread.

David's analysis explores how 22FFL still uses 22-nm design rules (a determinant of density) while back-porting advances in Intel's FinFETs from the 14-nm and 10-nm nodes. He further considers how 22FFL is better-suited for customers using electronic design automation (EDA) tools and those whose designs include analog, radio-frequency, and I/O devices than Intel's 22-nm and 14-nm SoC processes—all in especially low-power design envelopes and at lower costs, to boot. If you've been curious about just how 22FFL is meant to court Intel custom-foundry clients, David's article is an essential read.

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