Official Intel docs say all Skylake-X CPUs are equally AVX-512 capable

Update 2/14/18 4:45 PM: Intel confirmed to me via email that its specifications regarding these chips are accurate. The original article continues below.

Despite initial word from the horse's mouth that Intel's Core i7 Skylake-X CPUs would boast only one AVX-512 FMA unit per core and Core i9 CPUs would have two such functional units per core, official documentation pointed out by CPU detective InstLatX64 on Twitter today confirms that Skylake-X Core i7s and Core i9s are actually equally capable in that regard. Intel's own product comparison page, when loaded up with the Skylake-X family, shows that every chip of the brood is specced with two AVX-512 FMA units—a figure the company confirmed is correct.

Although we never got around to putting Intel's specs to the test, thanks to questions regarding the capabilities of engineering samples versus production chips and a dearth of benchmarks actually capable of employing AVX-512 instructions, some forum members at HWBot did test the Core i7-7800X versus the Core i9-7900X using the Flops tool last year. As its name suggests, Flops simply extracts the highest number of floating-point operations per second from CPUs, including chips with AVX-512 support. Those users saw similar per-core AVX-512 throughput from the i7-7800X and the i9-7900X, suggesting that the chips did in fact have two functional AVX-512 FMA units per core.

A block diagram of the Skylake Server core

AVX-512 is still in its infancy for desktop users and may be quite some time from widespread adoption, but folks looking to program for the new instruction set would seem to be able to enjoy full potential AVX-512 throughput from any Skylake-X product, not just the pricey Core i9 line. Those capabilities would mesh with Intel's Xeon W family of chips, all of which are built from the same Skylake Server silicon and have two AVX-512 FMAs enabled per core. If I can find the time soon, I'll put our own Skylake-X CPUs to the test with Flops and report what I find.

Comments closed
    • ronch
    • 2 years ago

    Even without AVX-512 capability I find the floating point prowess of modern day processors quite impressive, even staggering. SSE alone offers so much power and then there’s FMA, which is comparable to AVX-256. Really, having grown up with CPUs like the Cyrix M2 and K6-2 with 3DNow!, needing to patch Quake 2 for 3DNow! support, I’m not complaining about today’s modern FPUs.

    • Krogoth
    • 2 years ago

    Why would Intel gimp AVX512 support on their Skylake-X SKUs? They like gimping SSE, SSE2 support on non-Celeron/non-Pentium units.

      • Klimax
      • 2 years ago

      What gimping are you talking about? There is no gimping of SSEx instructions I could observe. (I am vectoring nice amount of code across the SSEx and AVXx)
      And finally evidence?

        • AnotherReader
        • 2 years ago

        He probably confused SSE with AVX. As far as I know, Pentiums and Celerons don’t support it.

    • smilingcrow
    • 2 years ago

    I wonder if AVX-512 is likely to be significant for video editing using Vegas Pro and other prosumer tools in the next few years?
    Looking to build a new desktop with as much future proofing as possible. I know, a fool’s game. 🙂

      • Krogoth
      • 2 years ago

      AVX-512 is pretty much meant for HPC applications. I doubt you’ll see it being used in video editing world.

        • smilingcrow
        • 2 years ago

        This is why I wondered if it might be useful:

        “Applications can pack 32 double precision and 64 single precision floating point operations per second per clock cycle within the 512-bit vectors, as well as eight 64-bit and sixteen 32-bit integers”.

        Would that cover the data types used in video editing?

        • FlamingSpaceJunk
        • 2 years ago

        Except it runs hot and throttles the core running the AVX-512 code badly. HPC folks are pretty mad about how half-baked it is and how much of a premium Intel is asking for AVX-512 enabled chips.

          • psuedonymous
          • 2 years ago

          The question is: even when running ‘throttled’ via AVX-512, is FLOP throughput higher than when ‘unthrottled’ and avoiding AVX? Because if AVX-512 is still faster, that just seems to be “working as designed” rather than a problem.

      • Freon
      • 2 years ago

      Vegas has NVENC support now…

      • FlamingSpaceJunk
      • 2 years ago

      I’d wait two years until the fallout from Meltdown/Spectre has settled and there are actual solutions to the problem.

        • Klimax
        • 2 years ago

        M/S are irrelevant to these areas. We are not going to wait for anything and probability of any impact is near zero. (Similar to games)

    • chuckula
    • 2 years ago

    Intel just can’t stop failing.
    They even fail at product segmentation these days!

    Slightly more seriously, but: [url=https://techreport.com/news/32472/intel-xeon-w-cpus-take-skylake-server-to-workstations?post=1050233<]This isn't really news[/url<]

      • Jeff Kampman
      • 2 years ago

      I mean, it is and it isn’t. It’s still very confusing to me that we were directly and repeatedly told at the tech day for these chips that some would have AVX-512 units fused off and some wouldn’t. It’s just been one of those back-burner things that I never got to dig into to the degree I would have liked.

        • Redocbew
        • 2 years ago

        Contradictions to an official statement are worth a little extra digging, I would think. It’s probably nothing, but just in case.

        • chuckula
        • 2 years ago

        It’s probably one bureaucratic group of people not talking to another bureaucratic group of people, which is pretty common in a big company.

          • Jeff Kampman
          • 2 years ago

          I’ve asked the big company what the deal is, so hopefully we can finally put this question to rest.

            • Jeff Kampman
            • 2 years ago

            And it’s confirmed: all Skylake-X chips have two AVX-512 FMAs.

            • Shobai
            • 2 years ago

            I think you should clearly specify which revision (initial or current) of the specification is correct; it’s ambiguous as written.

            [That is to say that a reader shouldn’t have to scroll to the bottom of the page, find and read your comment, in order to correctly interpret the edit at the start of the article]

        • tipoo
        • 2 years ago

        So, Intel said the Future is Fusing?

        …Yes, I know where the door is, I’ll see myself out

          • Redocbew
          • 2 years ago

          It would seem they did, and now they don’t.

            • tipoo
            • 2 years ago

            Intel don’t think it be like it is, but it do

            • chuckula
            • 2 years ago

            The [url=http://i0.kym-cdn.com/entries/icons/original/000/012/059/they-dont-think-it-be-like-it-is-but-it-do.jpg<]picture[/url<] really brings it together.

          • Neutronbeam
          • 2 years ago

          The Future is ConFusing…there, FTFY.

      • Neutronbeam
      • 2 years ago

      So they Flopped?

      • DoomGuy64
      • 2 years ago

      Intel’s product segmentation has historically kept most of their features from becoming mainstream, and now AMD has a competitive mainstream product. It makes sense that they drop the segmentation to improve software adoption, because it helps the mainstream parts compete with AMD.

      We may even see Intel boards support new CPUs at this rate, but none of this is due to Intel suddenly being nice guys. They’re just trying to maintain the monopoly, which they didn’t have to do against bulldozer.

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