Intel announced the next product in its Stratix 10 family of field-programmable gate arrays (FPGAs) this morning. The Stratix 10 TX family of network transceivers uses Intel's EMIB technology to integrate as many as five 58 Gbps transceiver modules alongside FPGAs comprising anywhere from 600K to 2.8 million programmable logic elements, according to Anandtech. Intel expects Stratix 10 TX chips to power networking devices for optical transport, perform network function virtualization, and find homes with cloud service providers and companies building 5G network infrastructure.
High bandwidth is apparently the name of the game in all of those potential applications, and Intel says the Stratix 10 TX can offer up to 144 transceiver lanes running at rates anywhere from 1 Gbps to 58 Gbps. Intel says the aggregate bandwidth from these connections should be sufficient to allow network architects to build out to 100G, 200G, or 400G delivery speeds. The Stratix 10 TX also supports 58G pulse amplitude modulation (PAM4) and 30 Gbps non-return-to-zero (NRZ) encoding schemes, allowing for backwards compatibility with existing network infrastructure. Intel says it'll also offer hardened intellectual property cores alongside the Stratix 10 TX, like 100 Gigabit Ethernet MACs and forward error correction (FEC). Next-generation network designers looking to take advantage of the Stratix 10 FPGA should be able to get their hands on those chips today.